[PATCH] D68337: [ARM][MVE] Enable extending masked loads
Sam Parker via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 2 07:24:47 PDT 2019
samparker created this revision.
samparker added reviewers: dmgreen, efriedma, SjoerdMeijer.
Herald added a subscriber: kristof.beyls.
Allow us to generate sext/zext masked loads which can access v4i8, v8i8 and v4i16 memory to produce v4i32, v8i16 and v4i32 respectively.
My little (endian) brain only really works in that mode, so I'm dubious about the big endian support here.
https://reviews.llvm.org/D68337
Files:
lib/Target/ARM/ARMISelLowering.cpp
lib/Target/ARM/ARMInstrMVE.td
lib/Target/ARM/ARMTargetTransformInfo.cpp
test/CodeGen/Thumb2/LowOverheadLoops/mve-tail-data-types.ll
test/CodeGen/Thumb2/mve-masked-ldst.ll
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