[PATCH] D68200: [AMDGPU] Extend buffer intrinsics with swizzling
Nicolai Hähnle via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 2 05:20:04 PDT 2019
nhaehnle accepted this revision.
nhaehnle added a comment.
This revision is now accepted and ready to land.
LGTM
================
Comment at: lib/Target/AMDGPU/SILoadStoreOptimizer.cpp:522
+ /* Do not merge VMEM buffer instructions with "swizzled" bit set. */
+ int swizzled = AMDGPU::getNamedOperandIdx(CI.I->getOpcode(), AMDGPU::OpName::swz);
----------------
piotr wrote:
> nhaehnle wrote:
> > piotr wrote:
> > > arsenm wrote:
> > > > Single line comment
> > > Ah yes, sorry I keep making this error. I will use the C++-style comment and also rename "swizzled" to "Swizzled".
> > In the discussion in August there seems to have largely been consensus for moving LLVM towards lowerCamelCase variable naming.
> Yes, there will be a sweeping change modifying all occurrences at the same time.
Maybe. Maybe not. The point is, using lowerCamelCase on variables today should be fine. Either way, it's no big deal.
Repository:
rL LLVM
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D68200/new/
https://reviews.llvm.org/D68200
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