[PATCH] D68247: [X86] Add a DAG combine to shrink vXi64 gather/scatter indices that are constant with sufficient sign bits to fit in vXi32
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Tue Oct 1 16:16:37 PDT 2019
This revision was automatically updated to reflect the committed changes.
Closed by commit rL373408: [X86] Add a DAG combine to shrink vXi64 gather/scatter indices that areā¦ (authored by ctopper, committed by ).
Changed prior to commit:
https://reviews.llvm.org/D68247?vs=222506&id=222724#toc
Repository:
rL LLVM
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D68247/new/
https://reviews.llvm.org/D68247
Files:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
llvm/trunk/test/CodeGen/X86/masked_gather_scatter.ll
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