[PATCH] D68232: [DAGCombine] Match a greater range of rotate when not all bits are demanded.

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added a comment.

vector tests?



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Comment at: lib/CodeGen/SelectionDAG/DAGCombiner.cpp:6376
+  return MatchRotate(LHS, RHS, DL,
+                     APInt::getMaxValue(LHS.getValueType().getSizeInBits()));
+}
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Shouldn't this be: APInt::getMaxValue(LHS.getScalarValueSizeInBits()) ?

TBH I'd prefer getAllOnesValue as well as it avoids the signed/unsigned ambiguity of getMaxValue.


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Comment at: lib/CodeGen/SelectionDAG/DAGCombiner.cpp:6475
+        APInt::getMaxValue(RotAmount).zextOrTrunc(DemandedBits.getBitWidth());
+    if ((DemandedBits & RotMask) != DemandedBits)
+      return false;
----------------
isSubsetOf ?


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D68232/new/

https://reviews.llvm.org/D68232