[llvm] r373293 - AMDGPU/GlobalISel: Avoid creating shift of 0 in arg lowering
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 30 18:44:46 PDT 2019
Author: arsenm
Date: Mon Sep 30 18:44:46 2019
New Revision: 373293
URL: http://llvm.org/viewvc/llvm-project?rev=373293&view=rev
Log:
AMDGPU/GlobalISel: Avoid creating shift of 0 in arg lowering
This is sort of papering over the fact that we don't run a combiner
anywhere, but avoiding creating 2 instructions in the first place is
easy.
Modified:
llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workitem.id.ll
Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp?rev=373293&r1=373292&r2=373293&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp Mon Sep 30 18:44:46 2019
@@ -1717,9 +1717,14 @@ bool AMDGPULegalizerInfo::loadInputValue
const unsigned Mask = Arg->getMask();
const unsigned Shift = countTrailingZeros<unsigned>(Mask);
- auto ShiftAmt = B.buildConstant(S32, Shift);
- auto LShr = B.buildLShr(S32, LiveIn, ShiftAmt);
- B.buildAnd(DstReg, LShr, B.buildConstant(S32, Mask >> Shift));
+ Register AndMaskSrc = LiveIn;
+
+ if (Shift != 0) {
+ auto ShiftAmt = B.buildConstant(S32, Shift);
+ AndMaskSrc = B.buildLShr(S32, LiveIn, ShiftAmt).getReg(0);
+ }
+
+ B.buildAnd(DstReg, AndMaskSrc, B.buildConstant(S32, Mask >> Shift));
} else
B.buildCopy(DstReg, LiveIn);
Modified: llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workitem.id.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workitem.id.ll?rev=373293&r1=373292&r2=373293&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workitem.id.ll (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workitem.id.ll Mon Sep 30 18:44:46 2019
@@ -89,7 +89,7 @@ bb2:
}
; ALL-LABEL: {{^}}test_workitem_id_x_func:
-; ALL: v_lshrrev_b32_e32 v2, 0, v2
+; ALL: s_waitcnt
; ALL-NEXT: v_and_b32_e32 v2, 0x3ff, v2
define void @test_workitem_id_x_func(i32 addrspace(1)* %out) #1 {
%id = call i32 @llvm.amdgcn.workitem.id.x()
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