[PATCH] D68200: [AMDGPU] Extend buffer intrinsics with swizzling
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 30 07:12:41 PDT 2019
arsenm added inline comments.
================
Comment at: include/llvm/IR/IntrinsicsAMDGPU.td:903
llvm_i32_ty], // cachepolicy(imm; bit 0 = glc, bit 1 = slc, bit 2 = dlc on gfx10+)
+ // swizzled buffer(imm; bit 3 = swz)
[IntrReadMem, ImmArg<3>], "", [SDNPMemOperand]>,
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arsenm wrote:
> Need to use immarg for all of these
Actually this isn't adding a new argument, but also doesn't have anything to do with the cachepolicy
Repository:
rL LLVM
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D68200/new/
https://reviews.llvm.org/D68200
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