[llvm] r373181 - [X86] Remove some redundant isel patterns. NFCI
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Sun Sep 29 23:47:04 PDT 2019
Author: ctopper
Date: Sun Sep 29 23:47:03 2019
New Revision: 373181
URL: http://llvm.org/viewvc/llvm-project?rev=373181&view=rev
Log:
[X86] Remove some redundant isel patterns. NFCI
These are all also implemented in avx512_logical_lowering_types
with support for masking.
Modified:
llvm/trunk/lib/Target/X86/X86InstrAVX512.td
Modified: llvm/trunk/lib/Target/X86/X86InstrAVX512.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrAVX512.td?rev=373181&r1=373180&r2=373181&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrAVX512.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrAVX512.td Sun Sep 29 23:47:03 2019
@@ -5029,32 +5029,6 @@ let Predicates = [HasVLX] in {
def : Pat<(X86andnp VR128X:$src1, (loadv8i16 addr:$src2)),
(VPANDNQZ128rm VR128X:$src1, addr:$src2)>;
- def : Pat<(and VR128X:$src1,
- (bc_v4i32 (v4f32 (X86VBroadcast (loadf32 addr:$src2))))),
- (VPANDDZ128rmb VR128X:$src1, addr:$src2)>;
- def : Pat<(or VR128X:$src1,
- (bc_v4i32 (v4f32 (X86VBroadcast (loadf32 addr:$src2))))),
- (VPORDZ128rmb VR128X:$src1, addr:$src2)>;
- def : Pat<(xor VR128X:$src1,
- (bc_v4i32 (v4f32 (X86VBroadcast (loadf32 addr:$src2))))),
- (VPXORDZ128rmb VR128X:$src1, addr:$src2)>;
- def : Pat<(X86andnp VR128X:$src1,
- (bc_v4i32 (v4f32 (X86VBroadcast (loadf32 addr:$src2))))),
- (VPANDNDZ128rmb VR128X:$src1, addr:$src2)>;
-
- def : Pat<(and VR128X:$src1,
- (bc_v2i64 (v2f64 (X86VBroadcast (loadf64 addr:$src2))))),
- (VPANDQZ128rmb VR128X:$src1, addr:$src2)>;
- def : Pat<(or VR128X:$src1,
- (bc_v2i64 (v2f64 (X86VBroadcast (loadf64 addr:$src2))))),
- (VPORQZ128rmb VR128X:$src1, addr:$src2)>;
- def : Pat<(xor VR128X:$src1,
- (bc_v2i64 (v2f64 (X86VBroadcast (loadf64 addr:$src2))))),
- (VPXORQZ128rmb VR128X:$src1, addr:$src2)>;
- def : Pat<(X86andnp VR128X:$src1,
- (bc_v2i64 (v2f64 (X86VBroadcast (loadf64 addr:$src2))))),
- (VPANDNQZ128rmb VR128X:$src1, addr:$src2)>;
-
def : Pat<(v32i8 (and VR256X:$src1, VR256X:$src2)),
(VPANDQZ256rr VR256X:$src1, VR256X:$src2)>;
def : Pat<(v16i16 (and VR256X:$src1, VR256X:$src2)),
@@ -5094,32 +5068,6 @@ let Predicates = [HasVLX] in {
(VPANDNQZ256rm VR256X:$src1, addr:$src2)>;
def : Pat<(X86andnp VR256X:$src1, (loadv16i16 addr:$src2)),
(VPANDNQZ256rm VR256X:$src1, addr:$src2)>;
-
- def : Pat<(and VR256X:$src1,
- (bc_v8i32 (v8f32 (X86VBroadcast (loadf32 addr:$src2))))),
- (VPANDDZ256rmb VR256X:$src1, addr:$src2)>;
- def : Pat<(or VR256X:$src1,
- (bc_v8i32 (v8f32 (X86VBroadcast (loadf32 addr:$src2))))),
- (VPORDZ256rmb VR256X:$src1, addr:$src2)>;
- def : Pat<(xor VR256X:$src1,
- (bc_v8i32 (v8f32 (X86VBroadcast (loadf32 addr:$src2))))),
- (VPXORDZ256rmb VR256X:$src1, addr:$src2)>;
- def : Pat<(X86andnp VR256X:$src1,
- (bc_v8i32 (v8f32 (X86VBroadcast (loadf32 addr:$src2))))),
- (VPANDNDZ256rmb VR256X:$src1, addr:$src2)>;
-
- def : Pat<(and VR256X:$src1,
- (bc_v4i64 (v4f64 (X86VBroadcast (loadf64 addr:$src2))))),
- (VPANDQZ256rmb VR256X:$src1, addr:$src2)>;
- def : Pat<(or VR256X:$src1,
- (bc_v4i64 (v4f64 (X86VBroadcast (loadf64 addr:$src2))))),
- (VPORQZ256rmb VR256X:$src1, addr:$src2)>;
- def : Pat<(xor VR256X:$src1,
- (bc_v4i64 (v4f64 (X86VBroadcast (loadf64 addr:$src2))))),
- (VPXORQZ256rmb VR256X:$src1, addr:$src2)>;
- def : Pat<(X86andnp VR256X:$src1,
- (bc_v4i64 (v4f64 (X86VBroadcast (loadf64 addr:$src2))))),
- (VPANDNQZ256rmb VR256X:$src1, addr:$src2)>;
}
let Predicates = [HasAVX512] in {
@@ -5162,32 +5110,6 @@ let Predicates = [HasAVX512] in {
(VPANDNQZrm VR512:$src1, addr:$src2)>;
def : Pat<(X86andnp VR512:$src1, (loadv32i16 addr:$src2)),
(VPANDNQZrm VR512:$src1, addr:$src2)>;
-
- def : Pat<(and VR512:$src1,
- (bc_v16i32 (v16f32 (X86VBroadcast (loadf32 addr:$src2))))),
- (VPANDDZrmb VR512:$src1, addr:$src2)>;
- def : Pat<(or VR512:$src1,
- (bc_v16i32 (v16f32 (X86VBroadcast (loadf32 addr:$src2))))),
- (VPORDZrmb VR512:$src1, addr:$src2)>;
- def : Pat<(xor VR512:$src1,
- (bc_v16i32 (v16f32 (X86VBroadcast (loadf32 addr:$src2))))),
- (VPXORDZrmb VR512:$src1, addr:$src2)>;
- def : Pat<(X86andnp VR512:$src1,
- (bc_v16i32 (v16f32 (X86VBroadcast (loadf32 addr:$src2))))),
- (VPANDNDZrmb VR512:$src1, addr:$src2)>;
-
- def : Pat<(and VR512:$src1,
- (bc_v8i64 (v8f64 (X86VBroadcast (loadf64 addr:$src2))))),
- (VPANDQZrmb VR512:$src1, addr:$src2)>;
- def : Pat<(or VR512:$src1,
- (bc_v8i64 (v8f64 (X86VBroadcast (loadf64 addr:$src2))))),
- (VPORQZrmb VR512:$src1, addr:$src2)>;
- def : Pat<(xor VR512:$src1,
- (bc_v8i64 (v8f64 (X86VBroadcast (loadf64 addr:$src2))))),
- (VPXORQZrmb VR512:$src1, addr:$src2)>;
- def : Pat<(X86andnp VR512:$src1,
- (bc_v8i64 (v8f64 (X86VBroadcast (loadf64 addr:$src2))))),
- (VPANDNQZrmb VR512:$src1, addr:$src2)>;
}
// Patterns to catch vselect with different type than logic op.
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