[PATCH] D68154: [Dominators][CodeGen] Fix MachineDominatorTree preservation in PHIElimination
Jakub Kuderski via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Sep 29 12:35:31 PDT 2019
kuhar planned changes to this revision.
kuhar added a comment.
Thanks for the comments, @arsenm and @hiraditya.
I tried not declaring MDT as a preserved analysis at all, but I got issues with OrcJit unittests:
[2019-09-29 15:31:37.806980254] 0x54de520 Made Modification 'Simple Register Coalescing' on Function 'bar'...
[2019-09-29 15:31:37.807045279] 0x54de520 Freeing Pass 'Simple Register Coalescing' on Function 'bar'...
[2019-09-29 15:31:37.807075980] 0x54de520 Freeing Pass 'MachineDominator Tree Construction' on Function 'bar'...
[2019-09-29 15:31:37.807107079] 0x54de520 Executing Pass 'Rename Disconnected Subregister Components' on Function 'bar'...
[2019-09-29 15:31:37.807177117] 0x54de520 Freeing Pass 'Rename Disconnected Subregister Components' on Function 'bar'...
[2019-09-29 15:31:37.807204793] 0x54de520 Executing Pass 'Machine Instruction Scheduler' on Function 'bar'...
OrcJITTests: /home/kuba/llvm/llvm-project/llvm/include/llvm/PassAnalysisSupport.h:235: AnalysisType &llvm::Pass::getAnalysisID(llvm::AnalysisID) const [AnalysisType = llvm::MachineDominatorTree]: Assertion `ResultPass && "getAnalysis*() called on an analysis that was not " "'required' by pass!"' failed.
Not sure why this is the case, as I marked MDT as a required analysis for MachineScheduler. Do you have some tips here? I'm a newbie when it comes to MIR and Machine passes.
When I preserve the analysis in PHIElimination everything works.
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rL LLVM
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https://reviews.llvm.org/D68154/new/
https://reviews.llvm.org/D68154
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