[PATCH] D68121: [X86] Model MXCSR for all SSE instructions

[Pengfei Wang via Phabricator via llvm-commits]

pengfei updated this revision to Diff 222314.
pengfei added a comment.

Address review comments, add affected tests.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D68121/new/

https://reviews.llvm.org/D68121

Files:
  llvm/lib/Target/X86/X86InstrFormats.td
  llvm/lib/Target/X86/X86InstrInfo.cpp
  llvm/lib/Target/X86/X86InstrSSE.td
  llvm/lib/Target/X86/X86RegisterInfo.cpp
  llvm/lib/Target/X86/X86RegisterInfo.td
  llvm/test/CodeGen/MIR/X86/constant-pool.mir
  llvm/test/CodeGen/MIR/X86/fastmath.mir
  llvm/test/CodeGen/MIR/X86/memory-operands.mir
  llvm/test/CodeGen/X86/evex-to-vex-compress.mir
  llvm/test/CodeGen/X86/ipra-reg-usage.ll

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