[PATCH] D68123: [CodeGen][SelectionDAG] Fix tiny bug in ExpandIntRes_UADDSUBO

[Roman Lebedev via Phabricator via llvm-commits]

lebedev.ri added a comment.

Two remarks:

- Code duplication
- If this is purely theoretical, can the dead code be simply dropped?



================
Comment at: llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp:2261
   bool HasOpCarry = TLI.isOperationLegalOrCustom(
-      N->getOpcode() == ISD::ADD ? ISD::ADDCARRY : ISD::SUBCARRY,
+      N->getOpcode() == ISD::UADDO ? ISD::ADDCARRY : ISD::SUBCARRY,
       TLI.getTypeToExpandTo(*DAG.getContext(), LHS.getValueType()));
----------------
this


================
Comment at: llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp:2273
 
     unsigned Opc = N->getOpcode() == ISD::UADDO ? ISD::ADDCARRY : ISD::SUBCARRY;
     Lo = DAG.getNode(N->getOpcode(), dl, VTList, LoOps);
----------------
this


================
Comment at: llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp:2282
     // non-overflow-checking operation.
     auto Opc = N->getOpcode() == ISD::UADDO ? ISD::ADD : ISD::SUB;
     SDValue Sum = DAG.getNode(Opc, dl, LHS.getValueType(), LHS, RHS);
----------------
and this do basically the same thing.
At the very least you want to precompute which carry and non-carry opcodes you'll want to use, thus avoiding the bug altogether.


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  https://reviews.llvm.org/D68123/new/

https://reviews.llvm.org/D68123