[llvm] r373031 - [X86] Remove CodeGenOnly instructions added in r373021, but keep the isel patterns and add COPY_TO_REGCLASS to them.

[David Zarzycki via llvm-commits]

Hi Craig,

A locale bisect just finished. Does this fix the stage-two build failure introduced by r373021?

Dave

> On Sep 27, 2019, at 2:22 AM, Craig Topper via llvm-commits <llvm-commits at lists.llvm.org> wrote:
> 
> Author: ctopper
> Date: Thu Sep 26 16:22:15 2019
> New Revision: 373031
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=373031&view=rev
> Log:
> [X86] Remove CodeGenOnly instructions added in r373021, but keep the isel patterns and add COPY_TO_REGCLASS to them.
> 
> Modified:
>    llvm/trunk/lib/Target/X86/X86InstrAVX512.td
> 
> Modified: llvm/trunk/lib/Target/X86/X86InstrAVX512.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrAVX512.td?rev=373031&r1=373030&r2=373031&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86InstrAVX512.td (original)
> +++ llvm/trunk/lib/Target/X86/X86InstrAVX512.td Thu Sep 26 16:22:15 2019
> @@ -3958,18 +3958,6 @@ multiclass avx512_move_scalar<string asm
>                !strconcat(asm, "\t{$src, $dst {${mask}} {z}|",
>                "$dst {${mask}} {z}, $src}"),
>                [], _.ExeDomain>, EVEX, EVEX_KZ, Sched<[WriteFLoad]>;
> -    let isCodeGenOnly = 1 in {
> -    def rmk_alt : AVX512PI<0x10, MRMSrcMem, (outs _.FRC:$dst),
> -                  (ins _.FRC:$src0, _.KRCWM:$mask, _.ScalarMemOp:$src),
> -                  !strconcat(asm, "\t{$src, $dst {${mask}}|",
> -                  "$dst {${mask}}, $src}"),
> -                  [], _.ExeDomain>, EVEX, EVEX_K, Sched<[WriteFLoad]>;
> -    def rmkz_alt : AVX512PI<0x10, MRMSrcMem, (outs _.FRC:$dst),
> -                   (ins _.KRCWM:$mask, _.ScalarMemOp:$src),
> -                   !strconcat(asm, "\t{$src, $dst {${mask}} {z}|",
> -                   "$dst {${mask}} {z}, $src}"),
> -                   [], _.ExeDomain>, EVEX, EVEX_KZ, Sched<[WriteFLoad]>;
> -    }
>   }
>   def mr: AVX512PI<0x11, MRMDestMem, (outs), (ins _.ScalarMemOp:$dst, _.FRC:$src),
>              !strconcat(asm, "\t{$src, $dst|$dst, $src}"),
> @@ -4235,9 +4223,12 @@ def : Pat<(f32 (X86selects VK1WM:$mask,
>            (v4f32 (COPY_TO_REGCLASS FR32X:$src1, VR128X)))), FR32X)>;
> 
> def : Pat<(f32 (X86selects VK1WM:$mask, (loadf32 addr:$src), (f32 FR32X:$src0))),
> -          (VMOVSSZrmk_alt FR32X:$src0, VK1WM:$mask, addr:$src)>;
> +          (COPY_TO_REGCLASS
> +           (v4f32 (VMOVSSZrmk (v4f32 (COPY_TO_REGCLASS FR32X:$src0, VR128X)),
> +                                                       VK1WM:$mask, addr:$src)),
> +           FR32X)>;
> def : Pat<(f32 (X86selects VK1WM:$mask, (loadf32 addr:$src), fp32imm0)),
> -          (VMOVSSZrmkz_alt VK1WM:$mask, addr:$src)>;
> +          (COPY_TO_REGCLASS (v4f32 (VMOVSSZrmkz VK1WM:$mask, addr:$src)), FR32X)>;
> 
> def : Pat<(f64 (X86selects VK1WM:$mask, (f64 FR64X:$src1), (f64 FR64X:$src2))),
>           (COPY_TO_REGCLASS (v2f64 (VMOVSDZrrk
> @@ -4250,9 +4241,12 @@ def : Pat<(f64 (X86selects VK1WM:$mask,
>            (v2f64 (COPY_TO_REGCLASS FR64X:$src1, VR128X)))), FR64X)>;
> 
> def : Pat<(f64 (X86selects VK1WM:$mask, (loadf64 addr:$src), (f64 FR64X:$src0))),
> -          (VMOVSDZrmk_alt FR64X:$src0, VK1WM:$mask, addr:$src)>;
> +          (COPY_TO_REGCLASS
> +           (v2f64 (VMOVSDZrmk (v2f64 (COPY_TO_REGCLASS FR64X:$src0, VR128X)),
> +                                                       VK1WM:$mask, addr:$src)),
> +           FR64X)>;
> def : Pat<(f64 (X86selects VK1WM:$mask, (loadf64 addr:$src), fp64imm0)),
> -          (VMOVSDZrmkz_alt VK1WM:$mask, addr:$src)>;
> +          (COPY_TO_REGCLASS (v2f64 (VMOVSDZrmkz VK1WM:$mask, addr:$src)), FR64X)>;
> 
> let hasSideEffects = 0, isCodeGenOnly = 1, ForceDisassemble = 1 in {
>   def VMOVSSZrr_REV: AVX512<0x11, MRMDestReg, (outs VR128X:$dst),
> 
> 
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