[PATCH] D68098: [AArch64][SVE] Adding patterns for floating point SVE add instructions.

Ehsan Amiri via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Sep 26 12:30:11 PDT 2019


amehsan created this revision.
amehsan added reviewers: huntergr, rengolin, greened.
Herald added subscribers: llvm-commits, psnobl, rkruppe, hiraditya, kristof.beyls, tschuett.
Herald added a project: LLVM.

I started looking into SVE support, and it seems that there is a significant amount of work that needs to be done.  We are planning to spend some time to help with SVE support, but we are not quite sure where to start. So I thought to start with a very small patch that helps to understand the current status of SVE support. Also to see if there are any suggestions on how we can help more effectively with the development of SVE.


Repository:
  rL LLVM

https://reviews.llvm.org/D68098

Files:
  llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
  llvm/test/CodeGen/AArch64/sve-fp.ll


Index: llvm/test/CodeGen/AArch64/sve-fp.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/AArch64/sve-fp.ll
@@ -0,0 +1,25 @@
+; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s
+
+define <vscale x 8 x half> @fadd_h(<vscale x 8 x half> %a, <vscale x 8 x half> %b) {
+; CHECK-LABEL: fadd_h:
+; CHECK: fadd z0.h, z0.h, z1.h
+; CHECK-NEXT: ret
+  %res = fadd <vscale x 8 x half> %a, %b
+  ret <vscale x 8 x half> %res
+}
+
+define <vscale x 4 x float> @fadd_s(<vscale x 4 x float> %a, <vscale x 4 x float> %b) {
+; CHECK-LABEL: fadd_s:
+; CHECK: fadd z0.s, z0.s, z1.s
+; CHECK-NEXT: ret
+  %res = fadd <vscale x 4 x float> %a, %b
+  ret <vscale x 4 x float> %res
+}
+
+define <vscale x 2 x double> @fadd_d(<vscale x 2 x double> %a, <vscale x 2 x double> %b) {
+; CHECK-LABEL: fadd_d:
+; CHECK: fadd z0.d, z0.d, z1.d
+; CHECK-NEXT: ret
+  %res = fadd <vscale x 2 x double> %a, %b
+  ret <vscale x 2 x double> %res
+}
Index: llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
===================================================================
--- llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
+++ llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
@@ -1070,6 +1070,13 @@
   def : Pat<(nxv2f64 (bitconvert (nxv8f16 ZPR:$src))), (nxv2f64 ZPR:$src)>;
   def : Pat<(nxv2f64 (bitconvert (nxv4f32 ZPR:$src))), (nxv2f64 ZPR:$src)>;
 
+  def : Pat<(nxv8f16 (fadd (nxv8f16 ZPR:$Zs1), (nxv8f16 ZPR:$Zs2))),
+            (FADD_ZZZ_H ZPR:$Zs1, ZPR:$Zs2)>;
+  def : Pat<(nxv4f32 (fadd (nxv4f32 ZPR:$Zs1), (nxv4f32 ZPR:$Zs2))),
+            (FADD_ZZZ_S ZPR:$Zs1, ZPR:$Zs2)>;
+  def : Pat<(nxv2f64 (fadd (nxv2f64 ZPR:$Zs1), (nxv2f64 ZPR:$Zs2))),
+            (FADD_ZZZ_D ZPR:$Zs1, ZPR:$Zs2)>;
+
 }
 
 let Predicates = [HasSVE2] in {


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