[PATCH] D68084: [llvm-exegesis] Refactor how forbidden registers are computed.

Guillaume Chatelet via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Sep 26 07:01:34 PDT 2019


gchatelet accepted this revision.
gchatelet added inline comments.
This revision is now accepted and ready to land.


================
Comment at: llvm/tools/llvm-exegesis/lib/MCInstrDescView.cpp:275
     Stream << "- hasTiedRegisters (execution is always serial)\n";
-  if (hasAliasingRegisters())
+  if (hasAliasingRegisters(BitVector(RegInfo.getNumRegs())))
     Stream << "- hasAliasingRegisters\n";
----------------
`State.getRATC().emptyRegisters()`


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D68084/new/

https://reviews.llvm.org/D68084





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