[llvm] r372908 - [AMDGPU] Improve fma.f64 test. NFC.
Stanislav Mekhanoshin via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 25 11:50:34 PDT 2019
Author: rampitec
Date: Wed Sep 25 11:50:34 2019
New Revision: 372908
URL: http://llvm.org/viewvc/llvm-project?rev=372908&view=rev
Log:
[AMDGPU] Improve fma.f64 test. NFC.
Modified:
llvm/trunk/test/CodeGen/AMDGPU/fma.f64.ll
Modified: llvm/trunk/test/CodeGen/AMDGPU/fma.f64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/fma.f64.ll?rev=372908&r1=372907&r2=372908&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/fma.f64.ll (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/fma.f64.ll Wed Sep 25 11:50:34 2019
@@ -4,7 +4,7 @@
declare double @llvm.fma.f64(double, double, double) nounwind readnone
declare <2 x double> @llvm.fma.v2f64(<2 x double>, <2 x double>, <2 x double>) nounwind readnone
declare <4 x double> @llvm.fma.v4f64(<4 x double>, <4 x double>, <4 x double>) nounwind readnone
-
+declare double @llvm.fabs.f64(double) nounwind readnone
; FUNC-LABEL: {{^}}fma_f64:
; SI: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
@@ -45,3 +45,156 @@ define amdgpu_kernel void @fma_v4f64(<4
store <4 x double> %r3, <4 x double> addrspace(1)* %out
ret void
}
+
+; FUNC-LABEL: {{^}}fma_f64_abs_src0:
+; SI: v_fma_f64 {{v\[[0-9]+:[0-9]+\], |v\[[0-9]+:[0-9]+\]|, v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
+define amdgpu_kernel void @fma_f64_abs_src0(double addrspace(1)* %out, double addrspace(1)* %in1,
+ double addrspace(1)* %in2, double addrspace(1)* %in3) {
+ %r0 = load double, double addrspace(1)* %in1
+ %r1 = load double, double addrspace(1)* %in2
+ %r2 = load double, double addrspace(1)* %in3
+ %fabs = call double @llvm.fabs.f64(double %r0)
+ %r3 = tail call double @llvm.fma.f64(double %fabs, double %r1, double %r2)
+ store double %r3, double addrspace(1)* %out
+ ret void
+}
+
+; FUNC-LABEL: {{^}}fma_f64_abs_src1:
+; SI: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], \|v\[[0-9]+:[0-9]+\]\|, v\[[0-9]+:[0-9]+\]}}
+define amdgpu_kernel void @fma_f64_abs_src1(double addrspace(1)* %out, double addrspace(1)* %in1,
+ double addrspace(1)* %in2, double addrspace(1)* %in3) {
+ %r0 = load double, double addrspace(1)* %in1
+ %r1 = load double, double addrspace(1)* %in2
+ %r2 = load double, double addrspace(1)* %in3
+ %fabs = call double @llvm.fabs.f64(double %r1)
+ %r3 = tail call double @llvm.fma.f64(double %r0, double %fabs, double %r2)
+ store double %r3, double addrspace(1)* %out
+ ret void
+}
+
+; FUNC-LABEL: {{^}}fma_f64_abs_src2:
+; SI: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], \|v\[[0-9]+:[0-9]+\]\|}}
+define amdgpu_kernel void @fma_f64_abs_src2(double addrspace(1)* %out, double addrspace(1)* %in1,
+ double addrspace(1)* %in2, double addrspace(1)* %in3) {
+ %r0 = load double, double addrspace(1)* %in1
+ %r1 = load double, double addrspace(1)* %in2
+ %r2 = load double, double addrspace(1)* %in3
+ %fabs = call double @llvm.fabs.f64(double %r2)
+ %r3 = tail call double @llvm.fma.f64(double %r0, double %r1, double %fabs)
+ store double %r3, double addrspace(1)* %out
+ ret void
+}
+
+; FUNC-LABEL: {{^}}fma_f64_neg_src0:
+; SI: v_fma_f64 {{v\[[0-9]+:[0-9]+\], -v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
+define amdgpu_kernel void @fma_f64_neg_src0(double addrspace(1)* %out, double addrspace(1)* %in1,
+ double addrspace(1)* %in2, double addrspace(1)* %in3) {
+ %r0 = load double, double addrspace(1)* %in1
+ %r1 = load double, double addrspace(1)* %in2
+ %r2 = load double, double addrspace(1)* %in3
+ %fsub = fsub double -0.000000e+00, %r0
+ %r3 = tail call double @llvm.fma.f64(double %fsub, double %r1, double %r2)
+ store double %r3, double addrspace(1)* %out
+ ret void
+}
+
+; FUNC-LABEL: {{^}}fma_f64_neg_src1:
+; SI: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], -v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
+define amdgpu_kernel void @fma_f64_neg_src1(double addrspace(1)* %out, double addrspace(1)* %in1,
+ double addrspace(1)* %in2, double addrspace(1)* %in3) {
+ %r0 = load double, double addrspace(1)* %in1
+ %r1 = load double, double addrspace(1)* %in2
+ %r2 = load double, double addrspace(1)* %in3
+ %fsub = fsub double -0.000000e+00, %r1
+ %r3 = tail call double @llvm.fma.f64(double %r0, double %fsub, double %r2)
+ store double %r3, double addrspace(1)* %out
+ ret void
+}
+
+; FUNC-LABEL: {{^}}fma_f64_neg_src2:
+; SI: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], -v\[[0-9]+:[0-9]+\]}}
+define amdgpu_kernel void @fma_f64_neg_src2(double addrspace(1)* %out, double addrspace(1)* %in1,
+ double addrspace(1)* %in2, double addrspace(1)* %in3) {
+ %r0 = load double, double addrspace(1)* %in1
+ %r1 = load double, double addrspace(1)* %in2
+ %r2 = load double, double addrspace(1)* %in3
+ %fsub = fsub double -0.000000e+00, %r2
+ %r3 = tail call double @llvm.fma.f64(double %r0, double %r1, double %fsub)
+ store double %r3, double addrspace(1)* %out
+ ret void
+}
+
+; FUNC-LABEL: {{^}}fma_f64_abs_neg_src0:
+; SI: v_fma_f64 {{v\[[0-9]+:[0-9]+\], -\|v\[[0-9]+:[0-9]+\]\|, v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
+define amdgpu_kernel void @fma_f64_abs_neg_src0(double addrspace(1)* %out, double addrspace(1)* %in1,
+ double addrspace(1)* %in2, double addrspace(1)* %in3) {
+ %r0 = load double, double addrspace(1)* %in1
+ %r1 = load double, double addrspace(1)* %in2
+ %r2 = load double, double addrspace(1)* %in3
+ %fabs = call double @llvm.fabs.f64(double %r0)
+ %fsub = fsub double -0.000000e+00, %fabs
+ %r3 = tail call double @llvm.fma.f64(double %fsub, double %r1, double %r2)
+ store double %r3, double addrspace(1)* %out
+ ret void
+}
+
+; FUNC-LABEL: {{^}}fma_f64_abs_neg_src1:
+; SI: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], -\|v\[[0-9]+:[0-9]+\]\|, v\[[0-9]+:[0-9]+\]}}
+define amdgpu_kernel void @fma_f64_abs_neg_src1(double addrspace(1)* %out, double addrspace(1)* %in1,
+ double addrspace(1)* %in2, double addrspace(1)* %in3) {
+ %r0 = load double, double addrspace(1)* %in1
+ %r1 = load double, double addrspace(1)* %in2
+ %r2 = load double, double addrspace(1)* %in3
+ %fabs = call double @llvm.fabs.f64(double %r1)
+ %fsub = fsub double -0.000000e+00, %fabs
+ %r3 = tail call double @llvm.fma.f64(double %r0, double %fsub, double %r2)
+ store double %r3, double addrspace(1)* %out
+ ret void
+}
+
+; FUNC-LABEL: {{^}}fma_f64_abs_neg_src2:
+; SI: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], -\|v\[[0-9]+:[0-9]+\]\|}}
+define amdgpu_kernel void @fma_f64_abs_neg_src2(double addrspace(1)* %out, double addrspace(1)* %in1,
+ double addrspace(1)* %in2, double addrspace(1)* %in3) {
+ %r0 = load double, double addrspace(1)* %in1
+ %r1 = load double, double addrspace(1)* %in2
+ %r2 = load double, double addrspace(1)* %in3
+ %fabs = call double @llvm.fabs.f64(double %r2)
+ %fsub = fsub double -0.000000e+00, %fabs
+ %r3 = tail call double @llvm.fma.f64(double %r0, double %r1, double %fsub)
+ store double %r3, double addrspace(1)* %out
+ ret void
+}
+
+; FUNC-LABEL: {{^}}fma_f64_lit_src0:
+; SI: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], 2.0, v\[[0-9]+:[0-9]+\]}}
+define amdgpu_kernel void @fma_f64_lit_src0(double addrspace(1)* %out,
+ double addrspace(1)* %in2, double addrspace(1)* %in3) {
+ %r1 = load double, double addrspace(1)* %in2
+ %r2 = load double, double addrspace(1)* %in3
+ %r3 = tail call double @llvm.fma.f64(double +2.0, double %r1, double %r2)
+ store double %r3, double addrspace(1)* %out
+ ret void
+}
+
+; FUNC-LABEL: {{^}}fma_f64_lit_src1:
+; SI: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], 2.0, v\[[0-9]+:[0-9]+\]}}
+define amdgpu_kernel void @fma_f64_lit_src1(double addrspace(1)* %out, double addrspace(1)* %in1,
+ double addrspace(1)* %in3) {
+ %r0 = load double, double addrspace(1)* %in1
+ %r2 = load double, double addrspace(1)* %in3
+ %r3 = tail call double @llvm.fma.f64(double %r0, double +2.0, double %r2)
+ store double %r3, double addrspace(1)* %out
+ ret void
+}
+
+; FUNC-LABEL: {{^}}fma_f64_lit_src2:
+; SI: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], 2.0}}
+define amdgpu_kernel void @fma_f64_lit_src2(double addrspace(1)* %out, double addrspace(1)* %in1,
+ double addrspace(1)* %in2) {
+ %r0 = load double, double addrspace(1)* %in1
+ %r1 = load double, double addrspace(1)* %in2
+ %r3 = tail call double @llvm.fma.f64(double %r0, double %r1, double +2.0)
+ store double %r3, double addrspace(1)* %out
+ ret void
+}
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