[PATCH] D67963: [MIPS GlobalISel] Lower aggregate structure return arguments
Simon Atanasyan via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 25 04:58:14 PDT 2019
atanasyan added a comment.
In D67963#1680964 <https://reviews.llvm.org/D67963#1680964>, @Petar.Avramovic wrote:
> > It looks like the tests check calling the splitToValueTypes from the MipsCallLowering::lowerReturn only.
>
> Right. I will add tests for call of a function that returns aggregate structure.
> Now that I think of it, I didn't encounter any aggregate structure as an argument in test-suite.
> They get turned into inreg arguments like in this tests,
I think the following code is affected by the change in `MipsCallLowering::lowerFormalArguments`.
define { double, double } @bar({ double, double } %s) {
entry:
%retval = alloca { double, double }, align 8
%inval = alloca { double, double }, align 8
store { double, double } %s, { double, double }* %inval, align 8
%0 = bitcast { double, double }* %retval to i8*
%1 = bitcast { double, double }* %inval to i8*
call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 8 %0, i8* align 8 %1, i32 16, i1 false)
%2 = load { double, double }, { double, double }* %retval, align 8
ret { double, double } %2
}
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture writeonly, i8* nocapture readonly, i32, i1)
I do not know how to get such LLVM-IR code from, for example, C code. In Clang the `MipsABIInfo::classifyArgumentType` coerces an aggregate argument into series of `i32` arguments. But if your patch generates a correct code for aggregate arguments (I didn't check) let's add a test case and keep the patch as-is.
Repository:
rL LLVM
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https://reviews.llvm.org/D67963/new/
https://reviews.llvm.org/D67963
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