[PATCH] D67956: [ARM] Lower MVE i1 inserts through shifts, not inreg extend

[Dave Green via Phabricator via llvm-commits]

dmgreen created this revision.
dmgreen added reviewers: efriedma, samparker, simon_tatham, SjoerdMeijer, ostannard.
Herald added subscribers: hiraditya, kristof.beyls.
Herald added a project: LLVM.

This is an alternative to D67614 <https://reviews.llvm.org/D67614>. Instead of lowering i1 inserts through a SIGN_EXTEND_INREG and a BFI, we can go via a SHL and a SRA (and the BFI). This, instead of being optimised to a rsb ubfx pair, will become a sbfx as desired.


https://reviews.llvm.org/D67956

Files:
  llvm/lib/Target/ARM/ARMISelLowering.cpp
  llvm/test/CodeGen/Thumb2/mve-masked-ldst.ll
  llvm/test/CodeGen/Thumb2/mve-pred-bitcast.ll
  llvm/test/CodeGen/Thumb2/mve-pred-build-var.ll
  llvm/test/CodeGen/Thumb2/mve-pred-loadstore.ll

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