[llvm] r372522 - [X86] Add more tests for commuting evex vcmp instructions during isel to fold a load.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Sun Sep 22 12:06:08 PDT 2019
Author: ctopper
Date: Sun Sep 22 12:06:08 2019
New Revision: 372522
URL: http://llvm.org/viewvc/llvm-project?rev=372522&view=rev
Log:
[X86] Add more tests for commuting evex vcmp instructions during isel to fold a load.
Some of the isel patterns were not updated to check for
TargetConstant instead of Constant in r372338.
Modified:
llvm/trunk/test/CodeGen/X86/avx512-vec-cmp.ll
llvm/trunk/test/CodeGen/X86/commute-fcmp.ll
Modified: llvm/trunk/test/CodeGen/X86/avx512-vec-cmp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512-vec-cmp.ll?rev=372522&r1=372521&r2=372522&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avx512-vec-cmp.ll (original)
+++ llvm/trunk/test/CodeGen/X86/avx512-vec-cmp.ll Sun Sep 22 12:06:08 2019
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -show-mc-encoding -mattr=+avx512f | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 --check-prefix=KNL
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -show-mc-encoding -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 --check-prefix=AVX512BW
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -show-mc-encoding -mattr=+avx512f,+avx512bw,+avx512vl,+avx512dq | FileCheck %s --check-prefix=CHECK --check-prefix=SKX
+; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -show-mc-encoding -mattr=+avx512f | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 --check-prefix=KNL
+; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -show-mc-encoding -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 --check-prefix=AVX512BW
+; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -show-mc-encoding -mattr=+avx512f,+avx512bw,+avx512vl,+avx512dq | FileCheck %s --check-prefix=CHECK --check-prefix=SKX
define <16 x float> @test1(<16 x float> %x, <16 x float> %y) nounwind {
; CHECK-LABEL: test1:
@@ -614,6 +614,31 @@ define <2 x double> @test31(<2 x double>
ret <2 x double> %max
}
+define <2 x double> @test31_commute(<2 x double> %x, <2 x double> %x1, <2 x double>* %yp) nounwind {
+; AVX512-LABEL: test31_commute:
+; AVX512: ## %bb.0:
+; AVX512-NEXT: ## kill: def $xmm1 killed $xmm1 def $zmm1
+; AVX512-NEXT: ## kill: def $xmm0 killed $xmm0 def $zmm0
+; AVX512-NEXT: vmovupd (%rdi), %xmm2 ## encoding: [0xc5,0xf9,0x10,0x17]
+; AVX512-NEXT: vcmpltpd %zmm0, %zmm2, %k1 ## encoding: [0x62,0xf1,0xed,0x48,0xc2,0xc8,0x01]
+; AVX512-NEXT: vblendmpd %zmm0, %zmm1, %zmm0 {%k1} ## encoding: [0x62,0xf2,0xf5,0x49,0x65,0xc0]
+; AVX512-NEXT: ## kill: def $xmm0 killed $xmm0 killed $zmm0
+; AVX512-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
+; AVX512-NEXT: retq ## encoding: [0xc3]
+;
+; SKX-LABEL: test31_commute:
+; SKX: ## %bb.0:
+; SKX-NEXT: vmovupd (%rdi), %xmm2 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x10,0x17]
+; SKX-NEXT: vcmpltpd %xmm0, %xmm2, %k1 ## encoding: [0x62,0xf1,0xed,0x08,0xc2,0xc8,0x01]
+; SKX-NEXT: vblendmpd %xmm0, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf2,0xf5,0x09,0x65,0xc0]
+; SKX-NEXT: retq ## encoding: [0xc3]
+
+ %y = load <2 x double>, <2 x double>* %yp, align 4
+ %mask = fcmp olt <2 x double> %y, %x
+ %max = select <2 x i1> %mask, <2 x double> %x, <2 x double> %x1
+ ret <2 x double> %max
+}
+
define <4 x double> @test32(<4 x double> %x, <4 x double> %x1, <4 x double>* %yp) nounwind {
; AVX512-LABEL: test32:
; AVX512: ## %bb.0:
@@ -637,6 +662,30 @@ define <4 x double> @test32(<4 x double>
ret <4 x double> %max
}
+define <4 x double> @test32_commute(<4 x double> %x, <4 x double> %x1, <4 x double>* %yp) nounwind {
+; AVX512-LABEL: test32_commute:
+; AVX512: ## %bb.0:
+; AVX512-NEXT: ## kill: def $ymm1 killed $ymm1 def $zmm1
+; AVX512-NEXT: ## kill: def $ymm0 killed $ymm0 def $zmm0
+; AVX512-NEXT: vmovupd (%rdi), %ymm2 ## encoding: [0xc5,0xfd,0x10,0x17]
+; AVX512-NEXT: vcmpltpd %zmm0, %zmm2, %k1 ## encoding: [0x62,0xf1,0xed,0x48,0xc2,0xc8,0x01]
+; AVX512-NEXT: vblendmpd %zmm0, %zmm1, %zmm0 {%k1} ## encoding: [0x62,0xf2,0xf5,0x49,0x65,0xc0]
+; AVX512-NEXT: ## kill: def $ymm0 killed $ymm0 killed $zmm0
+; AVX512-NEXT: retq ## encoding: [0xc3]
+;
+; SKX-LABEL: test32_commute:
+; SKX: ## %bb.0:
+; SKX-NEXT: vmovupd (%rdi), %ymm2 ## EVEX TO VEX Compression encoding: [0xc5,0xfd,0x10,0x17]
+; SKX-NEXT: vcmpltpd %ymm0, %ymm2, %k1 ## encoding: [0x62,0xf1,0xed,0x28,0xc2,0xc8,0x01]
+; SKX-NEXT: vblendmpd %ymm0, %ymm1, %ymm0 {%k1} ## encoding: [0x62,0xf2,0xf5,0x29,0x65,0xc0]
+; SKX-NEXT: retq ## encoding: [0xc3]
+
+ %y = load <4 x double>, <4 x double>* %yp, align 4
+ %mask = fcmp ogt <4 x double> %x, %y
+ %max = select <4 x i1> %mask, <4 x double> %x, <4 x double> %x1
+ ret <4 x double> %max
+}
+
define <8 x double> @test33(<8 x double> %x, <8 x double> %x1, <8 x double>* %yp) nounwind {
; CHECK-LABEL: test33:
; CHECK: ## %bb.0:
@@ -649,6 +698,19 @@ define <8 x double> @test33(<8 x double>
ret <8 x double> %max
}
+define <8 x double> @test33_commute(<8 x double> %x, <8 x double> %x1, <8 x double>* %yp) nounwind {
+; CHECK-LABEL: test33_commute:
+; CHECK: ## %bb.0:
+; CHECK-NEXT: vmovupd (%rdi), %zmm2 ## encoding: [0x62,0xf1,0xfd,0x48,0x10,0x17]
+; CHECK-NEXT: vcmpltpd %zmm0, %zmm2, %k1 ## encoding: [0x62,0xf1,0xed,0x48,0xc2,0xc8,0x01]
+; CHECK-NEXT: vblendmpd %zmm0, %zmm1, %zmm0 {%k1} ## encoding: [0x62,0xf2,0xf5,0x49,0x65,0xc0]
+; CHECK-NEXT: retq ## encoding: [0xc3]
+ %y = load <8 x double>, <8 x double>* %yp, align 4
+ %mask = fcmp olt <8 x double> %y, %x
+ %max = select <8 x i1> %mask, <8 x double> %x, <8 x double> %x1
+ ret <8 x double> %max
+}
+
define <4 x float> @test34(<4 x float> %x, <4 x float> %x1, <4 x float>* %yp) nounwind {
; AVX512-LABEL: test34:
; AVX512: ## %bb.0:
@@ -672,6 +734,30 @@ define <4 x float> @test34(<4 x float> %
ret <4 x float> %max
}
+define <4 x float> @test34_commute(<4 x float> %x, <4 x float> %x1, <4 x float>* %yp) nounwind {
+; AVX512-LABEL: test34_commute:
+; AVX512: ## %bb.0:
+; AVX512-NEXT: ## kill: def $xmm1 killed $xmm1 def $zmm1
+; AVX512-NEXT: ## kill: def $xmm0 killed $xmm0 def $zmm0
+; AVX512-NEXT: vmovups (%rdi), %xmm2 ## encoding: [0xc5,0xf8,0x10,0x17]
+; AVX512-NEXT: vcmpltps %zmm0, %zmm2, %k1 ## encoding: [0x62,0xf1,0x6c,0x48,0xc2,0xc8,0x01]
+; AVX512-NEXT: vblendmps %zmm0, %zmm1, %zmm0 {%k1} ## encoding: [0x62,0xf2,0x75,0x49,0x65,0xc0]
+; AVX512-NEXT: ## kill: def $xmm0 killed $xmm0 killed $zmm0
+; AVX512-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
+; AVX512-NEXT: retq ## encoding: [0xc3]
+;
+; SKX-LABEL: test34_commute:
+; SKX: ## %bb.0:
+; SKX-NEXT: vmovups (%rdi), %xmm2 ## EVEX TO VEX Compression encoding: [0xc5,0xf8,0x10,0x17]
+; SKX-NEXT: vcmpltps %xmm0, %xmm2, %k1 ## encoding: [0x62,0xf1,0x6c,0x08,0xc2,0xc8,0x01]
+; SKX-NEXT: vblendmps %xmm0, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf2,0x75,0x09,0x65,0xc0]
+; SKX-NEXT: retq ## encoding: [0xc3]
+ %y = load <4 x float>, <4 x float>* %yp, align 4
+ %mask = fcmp olt <4 x float> %y, %x
+ %max = select <4 x i1> %mask, <4 x float> %x, <4 x float> %x1
+ ret <4 x float> %max
+}
+
define <8 x float> @test35(<8 x float> %x, <8 x float> %x1, <8 x float>* %yp) nounwind {
; AVX512-LABEL: test35:
; AVX512: ## %bb.0:
@@ -695,6 +781,30 @@ define <8 x float> @test35(<8 x float> %
ret <8 x float> %max
}
+define <8 x float> @test35_commute(<8 x float> %x, <8 x float> %x1, <8 x float>* %yp) nounwind {
+; AVX512-LABEL: test35_commute:
+; AVX512: ## %bb.0:
+; AVX512-NEXT: ## kill: def $ymm1 killed $ymm1 def $zmm1
+; AVX512-NEXT: ## kill: def $ymm0 killed $ymm0 def $zmm0
+; AVX512-NEXT: vmovups (%rdi), %ymm2 ## encoding: [0xc5,0xfc,0x10,0x17]
+; AVX512-NEXT: vcmpltps %zmm0, %zmm2, %k1 ## encoding: [0x62,0xf1,0x6c,0x48,0xc2,0xc8,0x01]
+; AVX512-NEXT: vblendmps %zmm0, %zmm1, %zmm0 {%k1} ## encoding: [0x62,0xf2,0x75,0x49,0x65,0xc0]
+; AVX512-NEXT: ## kill: def $ymm0 killed $ymm0 killed $zmm0
+; AVX512-NEXT: retq ## encoding: [0xc3]
+;
+; SKX-LABEL: test35_commute:
+; SKX: ## %bb.0:
+; SKX-NEXT: vmovups (%rdi), %ymm2 ## EVEX TO VEX Compression encoding: [0xc5,0xfc,0x10,0x17]
+; SKX-NEXT: vcmpltps %ymm0, %ymm2, %k1 ## encoding: [0x62,0xf1,0x6c,0x28,0xc2,0xc8,0x01]
+; SKX-NEXT: vblendmps %ymm0, %ymm1, %ymm0 {%k1} ## encoding: [0x62,0xf2,0x75,0x29,0x65,0xc0]
+; SKX-NEXT: retq ## encoding: [0xc3]
+
+ %y = load <8 x float>, <8 x float>* %yp, align 4
+ %mask = fcmp ogt <8 x float> %x, %y
+ %max = select <8 x i1> %mask, <8 x float> %x, <8 x float> %x1
+ ret <8 x float> %max
+}
+
define <16 x float> @test36(<16 x float> %x, <16 x float> %x1, <16 x float>* %yp) nounwind {
; CHECK-LABEL: test36:
; CHECK: ## %bb.0:
@@ -707,6 +817,19 @@ define <16 x float> @test36(<16 x float>
ret <16 x float> %max
}
+define <16 x float> @test36_commute(<16 x float> %x, <16 x float> %x1, <16 x float>* %yp) nounwind {
+; CHECK-LABEL: test36_commute:
+; CHECK: ## %bb.0:
+; CHECK-NEXT: vmovups (%rdi), %zmm2 ## encoding: [0x62,0xf1,0x7c,0x48,0x10,0x17]
+; CHECK-NEXT: vcmpltps %zmm0, %zmm2, %k1 ## encoding: [0x62,0xf1,0x6c,0x48,0xc2,0xc8,0x01]
+; CHECK-NEXT: vblendmps %zmm0, %zmm1, %zmm0 {%k1} ## encoding: [0x62,0xf2,0x75,0x49,0x65,0xc0]
+; CHECK-NEXT: retq ## encoding: [0xc3]
+ %y = load <16 x float>, <16 x float>* %yp, align 4
+ %mask = fcmp olt <16 x float> %y, %x
+ %max = select <16 x i1> %mask, <16 x float> %x, <16 x float> %x1
+ ret <16 x float> %max
+}
+
define <8 x double> @test37(<8 x double> %x, <8 x double> %x1, double* %ptr) nounwind {
; CHECK-LABEL: test37:
; CHECK: ## %bb.0:
@@ -723,6 +846,23 @@ define <8 x double> @test37(<8 x double>
ret <8 x double> %max
}
+define <8 x double> @test37_commute(<8 x double> %x, <8 x double> %x1, double* %ptr) nounwind {
+; CHECK-LABEL: test37_commute:
+; CHECK: ## %bb.0:
+; CHECK-NEXT: vbroadcastsd (%rdi), %zmm2 ## encoding: [0x62,0xf2,0xfd,0x48,0x19,0x17]
+; CHECK-NEXT: vcmpltpd %zmm0, %zmm2, %k1 ## encoding: [0x62,0xf1,0xed,0x48,0xc2,0xc8,0x01]
+; CHECK-NEXT: vblendmpd %zmm0, %zmm1, %zmm0 {%k1} ## encoding: [0x62,0xf2,0xf5,0x49,0x65,0xc0]
+; CHECK-NEXT: retq ## encoding: [0xc3]
+
+ %a = load double, double* %ptr
+ %v = insertelement <8 x double> undef, double %a, i32 0
+ %shuffle = shufflevector <8 x double> %v, <8 x double> undef, <8 x i32> zeroinitializer
+
+ %mask = fcmp ogt <8 x double> %x, %shuffle
+ %max = select <8 x i1> %mask, <8 x double> %x, <8 x double> %x1
+ ret <8 x double> %max
+}
+
define <4 x double> @test38(<4 x double> %x, <4 x double> %x1, double* %ptr) nounwind {
; AVX512-LABEL: test38:
; AVX512: ## %bb.0:
@@ -749,6 +889,33 @@ define <4 x double> @test38(<4 x double>
ret <4 x double> %max
}
+define <4 x double> @test38_commute(<4 x double> %x, <4 x double> %x1, double* %ptr) nounwind {
+; AVX512-LABEL: test38_commute:
+; AVX512: ## %bb.0:
+; AVX512-NEXT: ## kill: def $ymm1 killed $ymm1 def $zmm1
+; AVX512-NEXT: ## kill: def $ymm0 killed $ymm0 def $zmm0
+; AVX512-NEXT: vbroadcastsd (%rdi), %ymm2 ## encoding: [0xc4,0xe2,0x7d,0x19,0x17]
+; AVX512-NEXT: vcmpltpd %zmm0, %zmm2, %k1 ## encoding: [0x62,0xf1,0xed,0x48,0xc2,0xc8,0x01]
+; AVX512-NEXT: vblendmpd %zmm0, %zmm1, %zmm0 {%k1} ## encoding: [0x62,0xf2,0xf5,0x49,0x65,0xc0]
+; AVX512-NEXT: ## kill: def $ymm0 killed $ymm0 killed $zmm0
+; AVX512-NEXT: retq ## encoding: [0xc3]
+;
+; SKX-LABEL: test38_commute:
+; SKX: ## %bb.0:
+; SKX-NEXT: vbroadcastsd (%rdi), %ymm2 ## EVEX TO VEX Compression encoding: [0xc4,0xe2,0x7d,0x19,0x17]
+; SKX-NEXT: vcmpltpd %ymm0, %ymm2, %k1 ## encoding: [0x62,0xf1,0xed,0x28,0xc2,0xc8,0x01]
+; SKX-NEXT: vblendmpd %ymm0, %ymm1, %ymm0 {%k1} ## encoding: [0x62,0xf2,0xf5,0x29,0x65,0xc0]
+; SKX-NEXT: retq ## encoding: [0xc3]
+
+ %a = load double, double* %ptr
+ %v = insertelement <4 x double> undef, double %a, i32 0
+ %shuffle = shufflevector <4 x double> %v, <4 x double> undef, <4 x i32> zeroinitializer
+
+ %mask = fcmp ogt <4 x double> %x, %shuffle
+ %max = select <4 x i1> %mask, <4 x double> %x, <4 x double> %x1
+ ret <4 x double> %max
+}
+
define <2 x double> @test39(<2 x double> %x, <2 x double> %x1, double* %ptr) nounwind {
; AVX512-LABEL: test39:
; AVX512: ## %bb.0:
@@ -777,6 +944,36 @@ define <2 x double> @test39(<2 x double>
ret <2 x double> %max
}
+define <2 x double> @test39_commute(<2 x double> %x, <2 x double> %x1, double* %ptr) nounwind {
+; AVX512-LABEL: test39_commute:
+; AVX512: ## %bb.0:
+; AVX512-NEXT: ## kill: def $xmm1 killed $xmm1 def $zmm1
+; AVX512-NEXT: ## kill: def $xmm0 killed $xmm0 def $zmm0
+; AVX512-NEXT: vmovddup (%rdi), %xmm2 ## encoding: [0xc5,0xfb,0x12,0x17]
+; AVX512-NEXT: ## xmm2 = mem[0,0]
+; AVX512-NEXT: vcmpltpd %zmm0, %zmm2, %k1 ## encoding: [0x62,0xf1,0xed,0x48,0xc2,0xc8,0x01]
+; AVX512-NEXT: vblendmpd %zmm0, %zmm1, %zmm0 {%k1} ## encoding: [0x62,0xf2,0xf5,0x49,0x65,0xc0]
+; AVX512-NEXT: ## kill: def $xmm0 killed $xmm0 killed $zmm0
+; AVX512-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
+; AVX512-NEXT: retq ## encoding: [0xc3]
+;
+; SKX-LABEL: test39_commute:
+; SKX: ## %bb.0:
+; SKX-NEXT: vmovddup (%rdi), %xmm2 ## EVEX TO VEX Compression encoding: [0xc5,0xfb,0x12,0x17]
+; SKX-NEXT: ## xmm2 = mem[0,0]
+; SKX-NEXT: vcmpltpd %xmm0, %xmm2, %k1 ## encoding: [0x62,0xf1,0xed,0x08,0xc2,0xc8,0x01]
+; SKX-NEXT: vblendmpd %xmm0, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf2,0xf5,0x09,0x65,0xc0]
+; SKX-NEXT: retq ## encoding: [0xc3]
+
+ %a = load double, double* %ptr
+ %v = insertelement <2 x double> undef, double %a, i32 0
+ %shuffle = shufflevector <2 x double> %v, <2 x double> undef, <2 x i32> <i32 0, i32 0>
+
+ %mask = fcmp ogt <2 x double> %x, %shuffle
+ %max = select <2 x i1> %mask, <2 x double> %x, <2 x double> %x1
+ ret <2 x double> %max
+}
+
define <16 x float> @test40(<16 x float> %x, <16 x float> %x1, float* %ptr) nounwind {
; CHECK-LABEL: test40:
@@ -794,6 +991,23 @@ define <16 x float> @test40(<16 x floa
ret <16 x float> %max
}
+define <16 x float> @test40_commute(<16 x float> %x, <16 x float> %x1, float* %ptr) nounwind {
+; CHECK-LABEL: test40_commute:
+; CHECK: ## %bb.0:
+; CHECK-NEXT: vbroadcastss (%rdi), %zmm2 ## encoding: [0x62,0xf2,0x7d,0x48,0x18,0x17]
+; CHECK-NEXT: vcmpltps %zmm0, %zmm2, %k1 ## encoding: [0x62,0xf1,0x6c,0x48,0xc2,0xc8,0x01]
+; CHECK-NEXT: vblendmps %zmm0, %zmm1, %zmm0 {%k1} ## encoding: [0x62,0xf2,0x75,0x49,0x65,0xc0]
+; CHECK-NEXT: retq ## encoding: [0xc3]
+
+ %a = load float, float* %ptr
+ %v = insertelement <16 x float> undef, float %a, i32 0
+ %shuffle = shufflevector <16 x float> %v, <16 x float> undef, <16 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
+
+ %mask = fcmp ogt <16 x float> %x, %shuffle
+ %max = select <16 x i1> %mask, <16 x float> %x, <16 x float> %x1
+ ret <16 x float> %max
+}
+
define <8 x float> @test41(<8 x float> %x, <8 x float> %x1, float* %ptr) nounwind {
; AVX512-LABEL: test41:
; AVX512: ## %bb.0:
@@ -820,6 +1034,33 @@ define <8 x float> @test41(<8 x float>
ret <8 x float> %max
}
+define <8 x float> @test41_commute(<8 x float> %x, <8 x float> %x1, float* %ptr) nounwind {
+; AVX512-LABEL: test41_commute:
+; AVX512: ## %bb.0:
+; AVX512-NEXT: ## kill: def $ymm1 killed $ymm1 def $zmm1
+; AVX512-NEXT: ## kill: def $ymm0 killed $ymm0 def $zmm0
+; AVX512-NEXT: vbroadcastss (%rdi), %ymm2 ## encoding: [0xc4,0xe2,0x7d,0x18,0x17]
+; AVX512-NEXT: vcmpltps %zmm0, %zmm2, %k1 ## encoding: [0x62,0xf1,0x6c,0x48,0xc2,0xc8,0x01]
+; AVX512-NEXT: vblendmps %zmm0, %zmm1, %zmm0 {%k1} ## encoding: [0x62,0xf2,0x75,0x49,0x65,0xc0]
+; AVX512-NEXT: ## kill: def $ymm0 killed $ymm0 killed $zmm0
+; AVX512-NEXT: retq ## encoding: [0xc3]
+;
+; SKX-LABEL: test41_commute:
+; SKX: ## %bb.0:
+; SKX-NEXT: vbroadcastss (%rdi), %ymm2 ## EVEX TO VEX Compression encoding: [0xc4,0xe2,0x7d,0x18,0x17]
+; SKX-NEXT: vcmpltps %ymm0, %ymm2, %k1 ## encoding: [0x62,0xf1,0x6c,0x28,0xc2,0xc8,0x01]
+; SKX-NEXT: vblendmps %ymm0, %ymm1, %ymm0 {%k1} ## encoding: [0x62,0xf2,0x75,0x29,0x65,0xc0]
+; SKX-NEXT: retq ## encoding: [0xc3]
+
+ %a = load float, float* %ptr
+ %v = insertelement <8 x float> undef, float %a, i32 0
+ %shuffle = shufflevector <8 x float> %v, <8 x float> undef, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
+
+ %mask = fcmp ogt <8 x float> %x, %shuffle
+ %max = select <8 x i1> %mask, <8 x float> %x, <8 x float> %x1
+ ret <8 x float> %max
+}
+
define <4 x float> @test42(<4 x float> %x, <4 x float> %x1, float* %ptr) nounwind {
; AVX512-LABEL: test42:
; AVX512: ## %bb.0:
@@ -847,6 +1088,34 @@ define <4 x float> @test42(<4 x float>
ret <4 x float> %max
}
+define <4 x float> @test42_commute(<4 x float> %x, <4 x float> %x1, float* %ptr) nounwind {
+; AVX512-LABEL: test42_commute:
+; AVX512: ## %bb.0:
+; AVX512-NEXT: ## kill: def $xmm1 killed $xmm1 def $zmm1
+; AVX512-NEXT: ## kill: def $xmm0 killed $xmm0 def $zmm0
+; AVX512-NEXT: vbroadcastss (%rdi), %xmm2 ## encoding: [0xc4,0xe2,0x79,0x18,0x17]
+; AVX512-NEXT: vcmpltps %zmm0, %zmm2, %k1 ## encoding: [0x62,0xf1,0x6c,0x48,0xc2,0xc8,0x01]
+; AVX512-NEXT: vblendmps %zmm0, %zmm1, %zmm0 {%k1} ## encoding: [0x62,0xf2,0x75,0x49,0x65,0xc0]
+; AVX512-NEXT: ## kill: def $xmm0 killed $xmm0 killed $zmm0
+; AVX512-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
+; AVX512-NEXT: retq ## encoding: [0xc3]
+;
+; SKX-LABEL: test42_commute:
+; SKX: ## %bb.0:
+; SKX-NEXT: vbroadcastss (%rdi), %xmm2 ## EVEX TO VEX Compression encoding: [0xc4,0xe2,0x79,0x18,0x17]
+; SKX-NEXT: vcmpltps %xmm0, %xmm2, %k1 ## encoding: [0x62,0xf1,0x6c,0x08,0xc2,0xc8,0x01]
+; SKX-NEXT: vblendmps %xmm0, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf2,0x75,0x09,0x65,0xc0]
+; SKX-NEXT: retq ## encoding: [0xc3]
+
+ %a = load float, float* %ptr
+ %v = insertelement <4 x float> undef, float %a, i32 0
+ %shuffle = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 0, i32 0, i32 0, i32 0>
+
+ %mask = fcmp ogt <4 x float> %x, %shuffle
+ %max = select <4 x i1> %mask, <4 x float> %x, <4 x float> %x1
+ ret <4 x float> %max
+}
+
define <8 x double> @test43(<8 x double> %x, <8 x double> %x1, double* %ptr,<8 x i1> %mask_in) nounwind {
; KNL-LABEL: test43:
; KNL: ## %bb.0:
@@ -883,6 +1152,45 @@ define <8 x double> @test43(<8 x double>
ret <8 x double> %max
}
+define <8 x double> @test43_commute(<8 x double> %x, <8 x double> %x1, double* %ptr,<8 x i1> %mask_in) nounwind {
+; KNL-LABEL: test43_commute:
+; KNL: ## %bb.0:
+; KNL-NEXT: vpmovsxwq %xmm2, %zmm2 ## encoding: [0x62,0xf2,0x7d,0x48,0x24,0xd2]
+; KNL-NEXT: vpsllq $63, %zmm2, %zmm2 ## encoding: [0x62,0xf1,0xed,0x48,0x73,0xf2,0x3f]
+; KNL-NEXT: vbroadcastsd (%rdi), %zmm3 ## encoding: [0x62,0xf2,0xfd,0x48,0x19,0x1f]
+; KNL-NEXT: vcmpltpd %zmm0, %zmm3, %k1 ## encoding: [0x62,0xf1,0xe5,0x48,0xc2,0xc8,0x01]
+; KNL-NEXT: vptestmq %zmm2, %zmm2, %k1 {%k1} ## encoding: [0x62,0xf2,0xed,0x49,0x27,0xca]
+; KNL-NEXT: vblendmpd %zmm0, %zmm1, %zmm0 {%k1} ## encoding: [0x62,0xf2,0xf5,0x49,0x65,0xc0]
+; KNL-NEXT: retq ## encoding: [0xc3]
+;
+; AVX512BW-LABEL: test43_commute:
+; AVX512BW: ## %bb.0:
+; AVX512BW-NEXT: vpsllw $15, %xmm2, %xmm2 ## encoding: [0xc5,0xe9,0x71,0xf2,0x0f]
+; AVX512BW-NEXT: vpmovw2m %zmm2, %k1 ## encoding: [0x62,0xf2,0xfe,0x48,0x29,0xca]
+; AVX512BW-NEXT: vbroadcastsd (%rdi), %zmm2 ## encoding: [0x62,0xf2,0xfd,0x48,0x19,0x17]
+; AVX512BW-NEXT: vcmpltpd %zmm0, %zmm2, %k1 {%k1} ## encoding: [0x62,0xf1,0xed,0x49,0xc2,0xc8,0x01]
+; AVX512BW-NEXT: vblendmpd %zmm0, %zmm1, %zmm0 {%k1} ## encoding: [0x62,0xf2,0xf5,0x49,0x65,0xc0]
+; AVX512BW-NEXT: retq ## encoding: [0xc3]
+;
+; SKX-LABEL: test43_commute:
+; SKX: ## %bb.0:
+; SKX-NEXT: vpsllw $15, %xmm2, %xmm2 ## EVEX TO VEX Compression encoding: [0xc5,0xe9,0x71,0xf2,0x0f]
+; SKX-NEXT: vpmovw2m %xmm2, %k1 ## encoding: [0x62,0xf2,0xfe,0x08,0x29,0xca]
+; SKX-NEXT: vbroadcastsd (%rdi), %zmm2 ## encoding: [0x62,0xf2,0xfd,0x48,0x19,0x17]
+; SKX-NEXT: vcmpltpd %zmm0, %zmm2, %k1 {%k1} ## encoding: [0x62,0xf1,0xed,0x49,0xc2,0xc8,0x01]
+; SKX-NEXT: vblendmpd %zmm0, %zmm1, %zmm0 {%k1} ## encoding: [0x62,0xf2,0xf5,0x49,0x65,0xc0]
+; SKX-NEXT: retq ## encoding: [0xc3]
+
+ %a = load double, double* %ptr
+ %v = insertelement <8 x double> undef, double %a, i32 0
+ %shuffle = shufflevector <8 x double> %v, <8 x double> undef, <8 x i32> zeroinitializer
+
+ %mask_cmp = fcmp ogt <8 x double> %x, %shuffle
+ %mask = and <8 x i1> %mask_cmp, %mask_in
+ %max = select <8 x i1> %mask, <8 x double> %x, <8 x double> %x1
+ ret <8 x double> %max
+}
+
define <4 x i32> @test44(<4 x i16> %x, <4 x i16> %y) #0 {
; AVX512-LABEL: test44:
; AVX512: ## %bb.0:
@@ -907,7 +1215,7 @@ define <2 x i64> @test45(<2 x i16> %x, <
; AVX512-NEXT: vpmovzxwq %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x34,0xc0]
; AVX512-NEXT: ## xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX512-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xdb,0x05,A,A,A,A]
-; AVX512-NEXT: ## fixup A - offset: 4, value: LCPI46_0-4, kind: reloc_riprel_4byte
+; AVX512-NEXT: ## fixup A - offset: 4, value: LCPI59_0-4, kind: reloc_riprel_4byte
; AVX512-NEXT: retq ## encoding: [0xc3]
;
; SKX-LABEL: test45:
@@ -928,7 +1236,7 @@ define <2 x i64> @test46(<2 x float> %x,
; AVX512-NEXT: vpermilps $212, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x04,0xc0,0xd4]
; AVX512-NEXT: ## xmm0 = xmm0[0,1,1,3]
; AVX512-NEXT: vandps {{.*}}(%rip), %xmm0, %xmm0 ## encoding: [0xc5,0xf8,0x54,0x05,A,A,A,A]
-; AVX512-NEXT: ## fixup A - offset: 4, value: LCPI47_0-4, kind: reloc_riprel_4byte
+; AVX512-NEXT: ## fixup A - offset: 4, value: LCPI60_0-4, kind: reloc_riprel_4byte
; AVX512-NEXT: retq ## encoding: [0xc3]
;
; SKX-LABEL: test46:
Modified: llvm/trunk/test/CodeGen/X86/commute-fcmp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/commute-fcmp.ll?rev=372522&r1=372521&r2=372522&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/commute-fcmp.ll (original)
+++ llvm/trunk/test/CodeGen/X86/commute-fcmp.ll Sun Sep 22 12:06:08 2019
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 -disable-peephole | FileCheck %s --check-prefix=SSE
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 -disable-peephole | FileCheck %s --check-prefix=AVX
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512vl -disable-peephole | FileCheck %s --check-prefix=AVX512
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512vl,+avx512dq -disable-peephole | FileCheck %s --check-prefix=AVX512
;
; Float Comparisons
@@ -788,3 +788,539 @@ define <4 x i64> @commute_cmppd_le_ymmm(
%3 = sext <4 x i1> %2 to <4 x i64>
ret <4 x i64> %3
}
+
+define <16 x i32> @commute_cmpps_eq_zmm(<16 x float>* %a0, <16 x float> %a1) {
+; SSE-LABEL: commute_cmpps_eq_zmm:
+; SSE: # %bb.0:
+; SSE-NEXT: cmpeqps (%rdi), %xmm0
+; SSE-NEXT: cmpeqps 16(%rdi), %xmm1
+; SSE-NEXT: cmpeqps 32(%rdi), %xmm2
+; SSE-NEXT: cmpeqps 48(%rdi), %xmm3
+; SSE-NEXT: retq
+;
+; AVX-LABEL: commute_cmpps_eq_zmm:
+; AVX: # %bb.0:
+; AVX-NEXT: vcmpeqps (%rdi), %ymm0, %ymm0
+; AVX-NEXT: vcmpeqps 32(%rdi), %ymm1, %ymm1
+; AVX-NEXT: retq
+;
+; AVX512-LABEL: commute_cmpps_eq_zmm:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vmovaps (%rdi), %zmm1
+; AVX512-NEXT: vcmpeqps %zmm0, %zmm1, %k0
+; AVX512-NEXT: vpmovm2d %k0, %zmm0
+; AVX512-NEXT: retq
+ %1 = load <16 x float>, <16 x float>* %a0
+ %2 = fcmp oeq <16 x float> %1, %a1
+ %3 = sext <16 x i1> %2 to <16 x i32>
+ ret <16 x i32> %3
+}
+
+define <16 x i32> @commute_cmpps_ne_zmm(<16 x float>* %a0, <16 x float> %a1) {
+; SSE-LABEL: commute_cmpps_ne_zmm:
+; SSE: # %bb.0:
+; SSE-NEXT: cmpneqps (%rdi), %xmm0
+; SSE-NEXT: cmpneqps 16(%rdi), %xmm1
+; SSE-NEXT: cmpneqps 32(%rdi), %xmm2
+; SSE-NEXT: cmpneqps 48(%rdi), %xmm3
+; SSE-NEXT: retq
+;
+; AVX-LABEL: commute_cmpps_ne_zmm:
+; AVX: # %bb.0:
+; AVX-NEXT: vcmpneqps (%rdi), %ymm0, %ymm0
+; AVX-NEXT: vcmpneqps 32(%rdi), %ymm1, %ymm1
+; AVX-NEXT: retq
+;
+; AVX512-LABEL: commute_cmpps_ne_zmm:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vmovaps (%rdi), %zmm1
+; AVX512-NEXT: vcmpneqps %zmm0, %zmm1, %k0
+; AVX512-NEXT: vpmovm2d %k0, %zmm0
+; AVX512-NEXT: retq
+ %1 = load <16 x float>, <16 x float>* %a0
+ %2 = fcmp une <16 x float> %1, %a1
+ %3 = sext <16 x i1> %2 to <16 x i32>
+ ret <16 x i32> %3
+}
+
+define <16 x i32> @commute_cmpps_ord_zmm(<16 x float>* %a0, <16 x float> %a1) {
+; SSE-LABEL: commute_cmpps_ord_zmm:
+; SSE: # %bb.0:
+; SSE-NEXT: cmpordps (%rdi), %xmm0
+; SSE-NEXT: cmpordps 16(%rdi), %xmm1
+; SSE-NEXT: cmpordps 32(%rdi), %xmm2
+; SSE-NEXT: cmpordps 48(%rdi), %xmm3
+; SSE-NEXT: retq
+;
+; AVX-LABEL: commute_cmpps_ord_zmm:
+; AVX: # %bb.0:
+; AVX-NEXT: vcmpordps (%rdi), %ymm0, %ymm0
+; AVX-NEXT: vcmpordps 32(%rdi), %ymm1, %ymm1
+; AVX-NEXT: retq
+;
+; AVX512-LABEL: commute_cmpps_ord_zmm:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vmovaps (%rdi), %zmm1
+; AVX512-NEXT: vcmpordps %zmm0, %zmm1, %k0
+; AVX512-NEXT: vpmovm2d %k0, %zmm0
+; AVX512-NEXT: retq
+ %1 = load <16 x float>, <16 x float>* %a0
+ %2 = fcmp ord <16 x float> %1, %a1
+ %3 = sext <16 x i1> %2 to <16 x i32>
+ ret <16 x i32> %3
+}
+
+define <16 x i32> @commute_cmpps_uno_zmm(<16 x float>* %a0, <16 x float> %a1) {
+; SSE-LABEL: commute_cmpps_uno_zmm:
+; SSE: # %bb.0:
+; SSE-NEXT: cmpunordps (%rdi), %xmm0
+; SSE-NEXT: cmpunordps 16(%rdi), %xmm1
+; SSE-NEXT: cmpunordps 32(%rdi), %xmm2
+; SSE-NEXT: cmpunordps 48(%rdi), %xmm3
+; SSE-NEXT: retq
+;
+; AVX-LABEL: commute_cmpps_uno_zmm:
+; AVX: # %bb.0:
+; AVX-NEXT: vcmpunordps (%rdi), %ymm0, %ymm0
+; AVX-NEXT: vcmpunordps 32(%rdi), %ymm1, %ymm1
+; AVX-NEXT: retq
+;
+; AVX512-LABEL: commute_cmpps_uno_zmm:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vmovaps (%rdi), %zmm1
+; AVX512-NEXT: vcmpunordps %zmm0, %zmm1, %k0
+; AVX512-NEXT: vpmovm2d %k0, %zmm0
+; AVX512-NEXT: retq
+ %1 = load <16 x float>, <16 x float>* %a0
+ %2 = fcmp uno <16 x float> %1, %a1
+ %3 = sext <16 x i1> %2 to <16 x i32>
+ ret <16 x i32> %3
+}
+
+define <16 x i32> @commute_cmpps_ueq_zmm(<16 x float>* %a0, <16 x float> %a1) {
+; SSE-LABEL: commute_cmpps_ueq_zmm:
+; SSE: # %bb.0:
+; SSE-NEXT: movaps (%rdi), %xmm7
+; SSE-NEXT: movaps 16(%rdi), %xmm5
+; SSE-NEXT: movaps 32(%rdi), %xmm6
+; SSE-NEXT: movaps 48(%rdi), %xmm8
+; SSE-NEXT: movaps %xmm7, %xmm4
+; SSE-NEXT: cmpeqps %xmm0, %xmm4
+; SSE-NEXT: cmpunordps %xmm7, %xmm0
+; SSE-NEXT: orps %xmm4, %xmm0
+; SSE-NEXT: movaps %xmm5, %xmm4
+; SSE-NEXT: cmpeqps %xmm1, %xmm4
+; SSE-NEXT: cmpunordps %xmm5, %xmm1
+; SSE-NEXT: orps %xmm4, %xmm1
+; SSE-NEXT: movaps %xmm6, %xmm4
+; SSE-NEXT: cmpeqps %xmm2, %xmm4
+; SSE-NEXT: cmpunordps %xmm6, %xmm2
+; SSE-NEXT: orps %xmm4, %xmm2
+; SSE-NEXT: movaps %xmm8, %xmm4
+; SSE-NEXT: cmpeqps %xmm3, %xmm4
+; SSE-NEXT: cmpunordps %xmm8, %xmm3
+; SSE-NEXT: orps %xmm4, %xmm3
+; SSE-NEXT: retq
+;
+; AVX-LABEL: commute_cmpps_ueq_zmm:
+; AVX: # %bb.0:
+; AVX-NEXT: vcmpeq_uqps (%rdi), %ymm0, %ymm0
+; AVX-NEXT: vcmpeq_uqps 32(%rdi), %ymm1, %ymm1
+; AVX-NEXT: retq
+;
+; AVX512-LABEL: commute_cmpps_ueq_zmm:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vmovaps (%rdi), %zmm1
+; AVX512-NEXT: vcmpeq_uqps %zmm0, %zmm1, %k0
+; AVX512-NEXT: vpmovm2d %k0, %zmm0
+; AVX512-NEXT: retq
+ %1 = load <16 x float>, <16 x float>* %a0
+ %2 = fcmp ueq <16 x float> %1, %a1
+ %3 = sext <16 x i1> %2 to <16 x i32>
+ ret <16 x i32> %3
+}
+
+define <16 x i32> @commute_cmpps_one_zmm(<16 x float>* %a0, <16 x float> %a1) {
+; SSE-LABEL: commute_cmpps_one_zmm:
+; SSE: # %bb.0:
+; SSE-NEXT: movaps (%rdi), %xmm7
+; SSE-NEXT: movaps 16(%rdi), %xmm5
+; SSE-NEXT: movaps 32(%rdi), %xmm6
+; SSE-NEXT: movaps 48(%rdi), %xmm8
+; SSE-NEXT: movaps %xmm7, %xmm4
+; SSE-NEXT: cmpneqps %xmm0, %xmm4
+; SSE-NEXT: cmpordps %xmm7, %xmm0
+; SSE-NEXT: andps %xmm4, %xmm0
+; SSE-NEXT: movaps %xmm5, %xmm4
+; SSE-NEXT: cmpneqps %xmm1, %xmm4
+; SSE-NEXT: cmpordps %xmm5, %xmm1
+; SSE-NEXT: andps %xmm4, %xmm1
+; SSE-NEXT: movaps %xmm6, %xmm4
+; SSE-NEXT: cmpneqps %xmm2, %xmm4
+; SSE-NEXT: cmpordps %xmm6, %xmm2
+; SSE-NEXT: andps %xmm4, %xmm2
+; SSE-NEXT: movaps %xmm8, %xmm4
+; SSE-NEXT: cmpneqps %xmm3, %xmm4
+; SSE-NEXT: cmpordps %xmm8, %xmm3
+; SSE-NEXT: andps %xmm4, %xmm3
+; SSE-NEXT: retq
+;
+; AVX-LABEL: commute_cmpps_one_zmm:
+; AVX: # %bb.0:
+; AVX-NEXT: vcmpneq_oqps (%rdi), %ymm0, %ymm0
+; AVX-NEXT: vcmpneq_oqps 32(%rdi), %ymm1, %ymm1
+; AVX-NEXT: retq
+;
+; AVX512-LABEL: commute_cmpps_one_zmm:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vmovaps (%rdi), %zmm1
+; AVX512-NEXT: vcmpneq_oqps %zmm0, %zmm1, %k0
+; AVX512-NEXT: vpmovm2d %k0, %zmm0
+; AVX512-NEXT: retq
+ %1 = load <16 x float>, <16 x float>* %a0
+ %2 = fcmp one <16 x float> %1, %a1
+ %3 = sext <16 x i1> %2 to <16 x i32>
+ ret <16 x i32> %3
+}
+
+define <16 x i32> @commute_cmpps_lt_zmm(<16 x float>* %a0, <16 x float> %a1) {
+; SSE-LABEL: commute_cmpps_lt_zmm:
+; SSE: # %bb.0:
+; SSE-NEXT: movaps (%rdi), %xmm4
+; SSE-NEXT: movaps 16(%rdi), %xmm5
+; SSE-NEXT: movaps 32(%rdi), %xmm6
+; SSE-NEXT: movaps 48(%rdi), %xmm7
+; SSE-NEXT: cmpltps %xmm0, %xmm4
+; SSE-NEXT: cmpltps %xmm1, %xmm5
+; SSE-NEXT: cmpltps %xmm2, %xmm6
+; SSE-NEXT: cmpltps %xmm3, %xmm7
+; SSE-NEXT: movaps %xmm4, %xmm0
+; SSE-NEXT: movaps %xmm5, %xmm1
+; SSE-NEXT: movaps %xmm6, %xmm2
+; SSE-NEXT: movaps %xmm7, %xmm3
+; SSE-NEXT: retq
+;
+; AVX-LABEL: commute_cmpps_lt_zmm:
+; AVX: # %bb.0:
+; AVX-NEXT: vmovaps (%rdi), %ymm2
+; AVX-NEXT: vmovaps 32(%rdi), %ymm3
+; AVX-NEXT: vcmpltps %ymm0, %ymm2, %ymm0
+; AVX-NEXT: vcmpltps %ymm1, %ymm3, %ymm1
+; AVX-NEXT: retq
+;
+; AVX512-LABEL: commute_cmpps_lt_zmm:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vmovaps (%rdi), %zmm1
+; AVX512-NEXT: vcmpltps %zmm0, %zmm1, %k0
+; AVX512-NEXT: vpmovm2d %k0, %zmm0
+; AVX512-NEXT: retq
+ %1 = load <16 x float>, <16 x float>* %a0
+ %2 = fcmp olt <16 x float> %1, %a1
+ %3 = sext <16 x i1> %2 to <16 x i32>
+ ret <16 x i32> %3
+}
+
+define <16 x i32> @commute_cmpps_le_zmm(<16 x float>* %a0, <16 x float> %a1) {
+; SSE-LABEL: commute_cmpps_le_zmm:
+; SSE: # %bb.0:
+; SSE-NEXT: movaps (%rdi), %xmm4
+; SSE-NEXT: movaps 16(%rdi), %xmm5
+; SSE-NEXT: movaps 32(%rdi), %xmm6
+; SSE-NEXT: movaps 48(%rdi), %xmm7
+; SSE-NEXT: cmpleps %xmm0, %xmm4
+; SSE-NEXT: cmpleps %xmm1, %xmm5
+; SSE-NEXT: cmpleps %xmm2, %xmm6
+; SSE-NEXT: cmpleps %xmm3, %xmm7
+; SSE-NEXT: movaps %xmm4, %xmm0
+; SSE-NEXT: movaps %xmm5, %xmm1
+; SSE-NEXT: movaps %xmm6, %xmm2
+; SSE-NEXT: movaps %xmm7, %xmm3
+; SSE-NEXT: retq
+;
+; AVX-LABEL: commute_cmpps_le_zmm:
+; AVX: # %bb.0:
+; AVX-NEXT: vmovaps (%rdi), %ymm2
+; AVX-NEXT: vmovaps 32(%rdi), %ymm3
+; AVX-NEXT: vcmpleps %ymm0, %ymm2, %ymm0
+; AVX-NEXT: vcmpleps %ymm1, %ymm3, %ymm1
+; AVX-NEXT: retq
+;
+; AVX512-LABEL: commute_cmpps_le_zmm:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vmovaps (%rdi), %zmm1
+; AVX512-NEXT: vcmpleps %zmm0, %zmm1, %k0
+; AVX512-NEXT: vpmovm2d %k0, %zmm0
+; AVX512-NEXT: retq
+ %1 = load <16 x float>, <16 x float>* %a0
+ %2 = fcmp ole <16 x float> %1, %a1
+ %3 = sext <16 x i1> %2 to <16 x i32>
+ ret <16 x i32> %3
+}
+
+define <8 x i64> @commute_cmppd_eq_zmmm(<8 x double>* %a0, <8 x double> %a1) {
+; SSE-LABEL: commute_cmppd_eq_zmmm:
+; SSE: # %bb.0:
+; SSE-NEXT: cmpeqpd (%rdi), %xmm0
+; SSE-NEXT: cmpeqpd 16(%rdi), %xmm1
+; SSE-NEXT: cmpeqpd 32(%rdi), %xmm2
+; SSE-NEXT: cmpeqpd 48(%rdi), %xmm3
+; SSE-NEXT: retq
+;
+; AVX-LABEL: commute_cmppd_eq_zmmm:
+; AVX: # %bb.0:
+; AVX-NEXT: vcmpeqpd (%rdi), %ymm0, %ymm0
+; AVX-NEXT: vcmpeqpd 32(%rdi), %ymm1, %ymm1
+; AVX-NEXT: retq
+;
+; AVX512-LABEL: commute_cmppd_eq_zmmm:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vmovapd (%rdi), %zmm1
+; AVX512-NEXT: vcmpeqpd %zmm0, %zmm1, %k0
+; AVX512-NEXT: vpmovm2q %k0, %zmm0
+; AVX512-NEXT: retq
+ %1 = load <8 x double>, <8 x double>* %a0
+ %2 = fcmp oeq <8 x double> %1, %a1
+ %3 = sext <8 x i1> %2 to <8 x i64>
+ ret <8 x i64> %3
+}
+
+define <8 x i64> @commute_cmppd_ne_zmmm(<8 x double>* %a0, <8 x double> %a1) {
+; SSE-LABEL: commute_cmppd_ne_zmmm:
+; SSE: # %bb.0:
+; SSE-NEXT: cmpneqpd (%rdi), %xmm0
+; SSE-NEXT: cmpneqpd 16(%rdi), %xmm1
+; SSE-NEXT: cmpneqpd 32(%rdi), %xmm2
+; SSE-NEXT: cmpneqpd 48(%rdi), %xmm3
+; SSE-NEXT: retq
+;
+; AVX-LABEL: commute_cmppd_ne_zmmm:
+; AVX: # %bb.0:
+; AVX-NEXT: vcmpneqpd (%rdi), %ymm0, %ymm0
+; AVX-NEXT: vcmpneqpd 32(%rdi), %ymm1, %ymm1
+; AVX-NEXT: retq
+;
+; AVX512-LABEL: commute_cmppd_ne_zmmm:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vmovapd (%rdi), %zmm1
+; AVX512-NEXT: vcmpneqpd %zmm0, %zmm1, %k0
+; AVX512-NEXT: vpmovm2q %k0, %zmm0
+; AVX512-NEXT: retq
+ %1 = load <8 x double>, <8 x double>* %a0
+ %2 = fcmp une <8 x double> %1, %a1
+ %3 = sext <8 x i1> %2 to <8 x i64>
+ ret <8 x i64> %3
+}
+
+define <8 x i64> @commute_cmppd_ord_zmmm(<8 x double>* %a0, <8 x double> %a1) {
+; SSE-LABEL: commute_cmppd_ord_zmmm:
+; SSE: # %bb.0:
+; SSE-NEXT: cmpordpd (%rdi), %xmm0
+; SSE-NEXT: cmpordpd 16(%rdi), %xmm1
+; SSE-NEXT: cmpordpd 32(%rdi), %xmm2
+; SSE-NEXT: cmpordpd 48(%rdi), %xmm3
+; SSE-NEXT: retq
+;
+; AVX-LABEL: commute_cmppd_ord_zmmm:
+; AVX: # %bb.0:
+; AVX-NEXT: vcmpordpd (%rdi), %ymm0, %ymm0
+; AVX-NEXT: vcmpordpd 32(%rdi), %ymm1, %ymm1
+; AVX-NEXT: retq
+;
+; AVX512-LABEL: commute_cmppd_ord_zmmm:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vmovapd (%rdi), %zmm1
+; AVX512-NEXT: vcmpordpd %zmm0, %zmm1, %k0
+; AVX512-NEXT: vpmovm2q %k0, %zmm0
+; AVX512-NEXT: retq
+ %1 = load <8 x double>, <8 x double>* %a0
+ %2 = fcmp ord <8 x double> %1, %a1
+ %3 = sext <8 x i1> %2 to <8 x i64>
+ ret <8 x i64> %3
+}
+
+define <8 x i64> @commute_cmppd_uno_zmmm(<8 x double>* %a0, <8 x double> %a1) {
+; SSE-LABEL: commute_cmppd_uno_zmmm:
+; SSE: # %bb.0:
+; SSE-NEXT: cmpunordpd (%rdi), %xmm0
+; SSE-NEXT: cmpunordpd 16(%rdi), %xmm1
+; SSE-NEXT: cmpunordpd 32(%rdi), %xmm2
+; SSE-NEXT: cmpunordpd 48(%rdi), %xmm3
+; SSE-NEXT: retq
+;
+; AVX-LABEL: commute_cmppd_uno_zmmm:
+; AVX: # %bb.0:
+; AVX-NEXT: vcmpunordpd (%rdi), %ymm0, %ymm0
+; AVX-NEXT: vcmpunordpd 32(%rdi), %ymm1, %ymm1
+; AVX-NEXT: retq
+;
+; AVX512-LABEL: commute_cmppd_uno_zmmm:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vmovapd (%rdi), %zmm1
+; AVX512-NEXT: vcmpunordpd %zmm0, %zmm1, %k0
+; AVX512-NEXT: vpmovm2q %k0, %zmm0
+; AVX512-NEXT: retq
+ %1 = load <8 x double>, <8 x double>* %a0
+ %2 = fcmp uno <8 x double> %1, %a1
+ %3 = sext <8 x i1> %2 to <8 x i64>
+ ret <8 x i64> %3
+}
+
+define <8 x i64> @commute_cmppd_ueq_zmmm(<8 x double>* %a0, <8 x double> %a1) {
+; SSE-LABEL: commute_cmppd_ueq_zmmm:
+; SSE: # %bb.0:
+; SSE-NEXT: movapd (%rdi), %xmm7
+; SSE-NEXT: movapd 16(%rdi), %xmm5
+; SSE-NEXT: movapd 32(%rdi), %xmm6
+; SSE-NEXT: movapd 48(%rdi), %xmm8
+; SSE-NEXT: movapd %xmm7, %xmm4
+; SSE-NEXT: cmpeqpd %xmm0, %xmm4
+; SSE-NEXT: cmpunordpd %xmm7, %xmm0
+; SSE-NEXT: orpd %xmm4, %xmm0
+; SSE-NEXT: movapd %xmm5, %xmm4
+; SSE-NEXT: cmpeqpd %xmm1, %xmm4
+; SSE-NEXT: cmpunordpd %xmm5, %xmm1
+; SSE-NEXT: orpd %xmm4, %xmm1
+; SSE-NEXT: movapd %xmm6, %xmm4
+; SSE-NEXT: cmpeqpd %xmm2, %xmm4
+; SSE-NEXT: cmpunordpd %xmm6, %xmm2
+; SSE-NEXT: orpd %xmm4, %xmm2
+; SSE-NEXT: movapd %xmm8, %xmm4
+; SSE-NEXT: cmpeqpd %xmm3, %xmm4
+; SSE-NEXT: cmpunordpd %xmm8, %xmm3
+; SSE-NEXT: orpd %xmm4, %xmm3
+; SSE-NEXT: retq
+;
+; AVX-LABEL: commute_cmppd_ueq_zmmm:
+; AVX: # %bb.0:
+; AVX-NEXT: vcmpeq_uqpd (%rdi), %ymm0, %ymm0
+; AVX-NEXT: vcmpeq_uqpd 32(%rdi), %ymm1, %ymm1
+; AVX-NEXT: retq
+;
+; AVX512-LABEL: commute_cmppd_ueq_zmmm:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vmovapd (%rdi), %zmm1
+; AVX512-NEXT: vcmpeq_uqpd %zmm0, %zmm1, %k0
+; AVX512-NEXT: vpmovm2q %k0, %zmm0
+; AVX512-NEXT: retq
+ %1 = load <8 x double>, <8 x double>* %a0
+ %2 = fcmp ueq <8 x double> %1, %a1
+ %3 = sext <8 x i1> %2 to <8 x i64>
+ ret <8 x i64> %3
+}
+
+define <8 x i64> @commute_cmppd_one_zmmm(<8 x double>* %a0, <8 x double> %a1) {
+; SSE-LABEL: commute_cmppd_one_zmmm:
+; SSE: # %bb.0:
+; SSE-NEXT: movapd (%rdi), %xmm7
+; SSE-NEXT: movapd 16(%rdi), %xmm5
+; SSE-NEXT: movapd 32(%rdi), %xmm6
+; SSE-NEXT: movapd 48(%rdi), %xmm8
+; SSE-NEXT: movapd %xmm7, %xmm4
+; SSE-NEXT: cmpneqpd %xmm0, %xmm4
+; SSE-NEXT: cmpordpd %xmm7, %xmm0
+; SSE-NEXT: andpd %xmm4, %xmm0
+; SSE-NEXT: movapd %xmm5, %xmm4
+; SSE-NEXT: cmpneqpd %xmm1, %xmm4
+; SSE-NEXT: cmpordpd %xmm5, %xmm1
+; SSE-NEXT: andpd %xmm4, %xmm1
+; SSE-NEXT: movapd %xmm6, %xmm4
+; SSE-NEXT: cmpneqpd %xmm2, %xmm4
+; SSE-NEXT: cmpordpd %xmm6, %xmm2
+; SSE-NEXT: andpd %xmm4, %xmm2
+; SSE-NEXT: movapd %xmm8, %xmm4
+; SSE-NEXT: cmpneqpd %xmm3, %xmm4
+; SSE-NEXT: cmpordpd %xmm8, %xmm3
+; SSE-NEXT: andpd %xmm4, %xmm3
+; SSE-NEXT: retq
+;
+; AVX-LABEL: commute_cmppd_one_zmmm:
+; AVX: # %bb.0:
+; AVX-NEXT: vcmpneq_oqpd (%rdi), %ymm0, %ymm0
+; AVX-NEXT: vcmpneq_oqpd 32(%rdi), %ymm1, %ymm1
+; AVX-NEXT: retq
+;
+; AVX512-LABEL: commute_cmppd_one_zmmm:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vmovapd (%rdi), %zmm1
+; AVX512-NEXT: vcmpneq_oqpd %zmm0, %zmm1, %k0
+; AVX512-NEXT: vpmovm2q %k0, %zmm0
+; AVX512-NEXT: retq
+ %1 = load <8 x double>, <8 x double>* %a0
+ %2 = fcmp one <8 x double> %1, %a1
+ %3 = sext <8 x i1> %2 to <8 x i64>
+ ret <8 x i64> %3
+}
+
+define <8 x i64> @commute_cmppd_lt_zmmm(<8 x double>* %a0, <8 x double> %a1) {
+; SSE-LABEL: commute_cmppd_lt_zmmm:
+; SSE: # %bb.0:
+; SSE-NEXT: movapd (%rdi), %xmm4
+; SSE-NEXT: movapd 16(%rdi), %xmm5
+; SSE-NEXT: movapd 32(%rdi), %xmm6
+; SSE-NEXT: movapd 48(%rdi), %xmm7
+; SSE-NEXT: cmpltpd %xmm0, %xmm4
+; SSE-NEXT: cmpltpd %xmm1, %xmm5
+; SSE-NEXT: cmpltpd %xmm2, %xmm6
+; SSE-NEXT: cmpltpd %xmm3, %xmm7
+; SSE-NEXT: movapd %xmm4, %xmm0
+; SSE-NEXT: movapd %xmm5, %xmm1
+; SSE-NEXT: movapd %xmm6, %xmm2
+; SSE-NEXT: movapd %xmm7, %xmm3
+; SSE-NEXT: retq
+;
+; AVX-LABEL: commute_cmppd_lt_zmmm:
+; AVX: # %bb.0:
+; AVX-NEXT: vmovapd (%rdi), %ymm2
+; AVX-NEXT: vmovapd 32(%rdi), %ymm3
+; AVX-NEXT: vcmpltpd %ymm0, %ymm2, %ymm0
+; AVX-NEXT: vcmpltpd %ymm1, %ymm3, %ymm1
+; AVX-NEXT: retq
+;
+; AVX512-LABEL: commute_cmppd_lt_zmmm:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vmovapd (%rdi), %zmm1
+; AVX512-NEXT: vcmpltpd %zmm0, %zmm1, %k0
+; AVX512-NEXT: vpmovm2q %k0, %zmm0
+; AVX512-NEXT: retq
+ %1 = load <8 x double>, <8 x double>* %a0
+ %2 = fcmp olt <8 x double> %1, %a1
+ %3 = sext <8 x i1> %2 to <8 x i64>
+ ret <8 x i64> %3
+}
+
+define <8 x i64> @commute_cmppd_le_zmmm(<8 x double>* %a0, <8 x double> %a1) {
+; SSE-LABEL: commute_cmppd_le_zmmm:
+; SSE: # %bb.0:
+; SSE-NEXT: movapd (%rdi), %xmm4
+; SSE-NEXT: movapd 16(%rdi), %xmm5
+; SSE-NEXT: movapd 32(%rdi), %xmm6
+; SSE-NEXT: movapd 48(%rdi), %xmm7
+; SSE-NEXT: cmplepd %xmm0, %xmm4
+; SSE-NEXT: cmplepd %xmm1, %xmm5
+; SSE-NEXT: cmplepd %xmm2, %xmm6
+; SSE-NEXT: cmplepd %xmm3, %xmm7
+; SSE-NEXT: movapd %xmm4, %xmm0
+; SSE-NEXT: movapd %xmm5, %xmm1
+; SSE-NEXT: movapd %xmm6, %xmm2
+; SSE-NEXT: movapd %xmm7, %xmm3
+; SSE-NEXT: retq
+;
+; AVX-LABEL: commute_cmppd_le_zmmm:
+; AVX: # %bb.0:
+; AVX-NEXT: vmovapd (%rdi), %ymm2
+; AVX-NEXT: vmovapd 32(%rdi), %ymm3
+; AVX-NEXT: vcmplepd %ymm0, %ymm2, %ymm0
+; AVX-NEXT: vcmplepd %ymm1, %ymm3, %ymm1
+; AVX-NEXT: retq
+;
+; AVX512-LABEL: commute_cmppd_le_zmmm:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vmovapd (%rdi), %zmm1
+; AVX512-NEXT: vcmplepd %zmm0, %zmm1, %k0
+; AVX512-NEXT: vpmovm2q %k0, %zmm0
+; AVX512-NEXT: retq
+ %1 = load <8 x double>, <8 x double>* %a0
+ %2 = fcmp ole <8 x double> %1, %a1
+ %3 = sext <8 x i1> %2 to <8 x i64>
+ ret <8 x i64> %3
+}
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