[llvm] r372345 - [NFC][PowerPC] Fast-isel VSX support test
Jinsong Ji via llvm-commits
llvm-commits at lists.llvm.org
Thu Sep 19 11:18:18 PDT 2019
Author: jsji
Date: Thu Sep 19 11:18:18 2019
New Revision: 372345
URL: http://llvm.org/viewvc/llvm-project?rev=372345&view=rev
Log:
[NFC][PowerPC] Fast-isel VSX support test
We have fixed most of the VSX limitation in Fast-isel,
so we can remove the -mattr=-vsx for most testcases now.
Modified:
llvm/trunk/test/CodeGen/PowerPC/fast-isel-call.ll
llvm/trunk/test/CodeGen/PowerPC/fast-isel-const.ll
llvm/trunk/test/CodeGen/PowerPC/fast-isel-load-store.ll
llvm/trunk/test/CodeGen/PowerPC/fast-isel-ret.ll
Modified: llvm/trunk/test/CodeGen/PowerPC/fast-isel-call.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/fast-isel-call.ll?rev=372345&r1=372344&r2=372345&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/fast-isel-call.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/fast-isel-call.ll Thu Sep 19 11:18:18 2019
@@ -1,8 +1,4 @@
-; FIXME: FastISel currently returns false if it hits code that uses VSX
-; registers and with -fast-isel-abort=1 turned on the test case will then fail.
-; When fastisel better supports VSX fix up this test case.
-;
-; RUN: llc < %s -O0 -relocation-model=pic -verify-machineinstrs -mattr=-vsx -fast-isel-abort=1 -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -ppc-late-peephole=true | FileCheck %s --check-prefix=ELF64
+; RUN: llc < %s -O0 -relocation-model=pic -verify-machineinstrs -fast-isel-abort=1 -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -ppc-late-peephole=true | FileCheck %s --check-prefix=ELF64
define i32 @t1(i8 signext %a) nounwind {
%1 = sext i8 %a to i32
Modified: llvm/trunk/test/CodeGen/PowerPC/fast-isel-const.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/fast-isel-const.ll?rev=372345&r1=372344&r2=372345&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/fast-isel-const.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/fast-isel-const.ll Thu Sep 19 11:18:18 2019
@@ -1,4 +1,4 @@
-; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=-vsx | FileCheck %s --check-prefix=ELF64
+; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s --check-prefix=ELF64
define zeroext i1 @testi1(i8 %in) nounwind {
entry:
Modified: llvm/trunk/test/CodeGen/PowerPC/fast-isel-load-store.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/fast-isel-load-store.ll?rev=372345&r1=372344&r2=372345&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/fast-isel-load-store.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/fast-isel-load-store.ll Thu Sep 19 11:18:18 2019
@@ -1,8 +1,5 @@
-; FIXME: FastISel currently returns false if it hits code that uses VSX
-; registers and with -fast-isel-abort=1 turned on the test case will then fail.
-; When fastisel better supports VSX fix up this test case.
-;
; RUN: llc -relocation-model=static < %s -O0 -verify-machineinstrs -fast-isel -fast-isel-abort=1 -mattr=-vsx -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s --check-prefix=ELF64
+; RUN: llc -relocation-model=static < %s -O0 -verify-machineinstrs -fast-isel -fast-isel-abort=1 -mattr=+vsx -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s --check-prefix=VSX
; RUN: llc -relocation-model=static < %s -O0 -verify-machineinstrs -fast-isel -fast-isel-abort=1 -mattr=spe -mtriple=powerpc-unknown-linux-gnu -mcpu=e500 | FileCheck %s --check-prefix=SPE
; This test verifies that load/store instructions are properly generated,
@@ -78,9 +75,11 @@ define double @t6() nounwind {
; SPE: t6
%1 = load double, double* @f, align 8
; ELF64: lfd
+; VSX: lxsdx
; SPE: evldd
%2 = fadd double %1, 1.0
; ELF64: fadd
+; VSX: xsadddp
; SPE: efdadd
ret double %2
}
@@ -150,6 +149,8 @@ define void @t12(double %v) nounwind {
store double %1, double* @f, align 8
; ELF64: fadd
; ELF64: stfd
+; VSX: xsadddp
+; VSX: stxsdx
; SPE: efdadd
; SPE: evstdd
ret void
Modified: llvm/trunk/test/CodeGen/PowerPC/fast-isel-ret.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/fast-isel-ret.ll?rev=372345&r1=372344&r2=372345&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/fast-isel-ret.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/fast-isel-ret.ll Thu Sep 19 11:18:18 2019
@@ -1,8 +1,4 @@
-; FIXME: FastISel currently returns false if it hits code that uses VSX
-; registers and with -fast-isel-abort=1 turned on the test case will then fail.
-; When fastisel better supports VSX fix up this test case.
-;
-; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=-vsx | FileCheck %s --check-prefix=ELF64
+; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s --check-prefix=ELF64
define zeroext i1 @rettrue() nounwind {
entry:
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