[llvm] r372324 - [Float2Int] auto-generate complete test checks; NFC
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Thu Sep 19 06:58:15 PDT 2019
Author: spatel
Date: Thu Sep 19 06:58:15 2019
New Revision: 372324
URL: http://llvm.org/viewvc/llvm-project?rev=372324&view=rev
Log:
[Float2Int] auto-generate complete test checks; NFC
Modified:
llvm/trunk/test/Transforms/Float2Int/basic.ll
Modified: llvm/trunk/test/Transforms/Float2Int/basic.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/Float2Int/basic.ll?rev=372324&r1=372323&r2=372324&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/Float2Int/basic.ll (original)
+++ llvm/trunk/test/Transforms/Float2Int/basic.ll Thu Sep 19 06:58:15 2019
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -float2int -S | FileCheck %s
; RUN: opt < %s -passes='float2int' -S | FileCheck %s
@@ -5,108 +6,116 @@
; Positive tests
;
-; CHECK-LABEL: @simple1
-; CHECK: %1 = zext i8 %a to i32
-; CHECK: %2 = add i32 %1, 1
-; CHECK: %3 = trunc i32 %2 to i16
-; CHECK: ret i16 %3
define i16 @simple1(i8 %a) {
- %1 = uitofp i8 %a to float
- %2 = fadd float %1, 1.0
- %3 = fptoui float %2 to i16
- ret i16 %3
+; CHECK-LABEL: @simple1(
+; CHECK-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
+; CHECK-NEXT: [[T21:%.*]] = add i32 [[TMP1]], 1
+; CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[T21]] to i16
+; CHECK-NEXT: ret i16 [[TMP2]]
+;
+ %t1 = uitofp i8 %a to float
+ %t2 = fadd float %t1, 1.0
+ %t3 = fptoui float %t2 to i16
+ ret i16 %t3
}
-; CHECK-LABEL: @simple2
-; CHECK: %1 = zext i8 %a to i32
-; CHECK: %2 = sub i32 %1, 1
-; CHECK: %3 = trunc i32 %2 to i8
-; CHECK: ret i8 %3
define i8 @simple2(i8 %a) {
- %1 = uitofp i8 %a to float
- %2 = fsub float %1, 1.0
- %3 = fptoui float %2 to i8
- ret i8 %3
+; CHECK-LABEL: @simple2(
+; CHECK-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
+; CHECK-NEXT: [[T21:%.*]] = sub i32 [[TMP1]], 1
+; CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[T21]] to i8
+; CHECK-NEXT: ret i8 [[TMP2]]
+;
+ %t1 = uitofp i8 %a to float
+ %t2 = fsub float %t1, 1.0
+ %t3 = fptoui float %t2 to i8
+ ret i8 %t3
}
-; CHECK-LABEL: @simple3
-; CHECK: %1 = zext i8 %a to i32
-; CHECK: %2 = sub i32 %1, 1
-; CHECK: ret i32 %2
define i32 @simple3(i8 %a) {
- %1 = uitofp i8 %a to float
- %2 = fsub float %1, 1.0
- %3 = fptoui float %2 to i32
- ret i32 %3
+; CHECK-LABEL: @simple3(
+; CHECK-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
+; CHECK-NEXT: [[T21:%.*]] = sub i32 [[TMP1]], 1
+; CHECK-NEXT: ret i32 [[T21]]
+;
+ %t1 = uitofp i8 %a to float
+ %t2 = fsub float %t1, 1.0
+ %t3 = fptoui float %t2 to i32
+ ret i32 %t3
}
-; CHECK-LABEL: @cmp
-; CHECK: %1 = zext i8 %a to i32
-; CHECK: %2 = zext i8 %b to i32
-; CHECK: %3 = icmp slt i32 %1, %2
-; CHECK: ret i1 %3
define i1 @cmp(i8 %a, i8 %b) {
- %1 = uitofp i8 %a to float
- %2 = uitofp i8 %b to float
- %3 = fcmp ult float %1, %2
- ret i1 %3
+; CHECK-LABEL: @cmp(
+; CHECK-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
+; CHECK-NEXT: [[TMP2:%.*]] = zext i8 [[B:%.*]] to i32
+; CHECK-NEXT: [[T31:%.*]] = icmp slt i32 [[TMP1]], [[TMP2]]
+; CHECK-NEXT: ret i1 [[T31]]
+;
+ %t1 = uitofp i8 %a to float
+ %t2 = uitofp i8 %b to float
+ %t3 = fcmp ult float %t1, %t2
+ ret i1 %t3
}
-; CHECK-LABEL: @simple4
-; CHECK: %1 = zext i32 %a to i64
-; CHECK: %2 = add i64 %1, 1
-; CHECK: %3 = trunc i64 %2 to i32
-; CHECK: ret i32 %3
define i32 @simple4(i32 %a) {
- %1 = uitofp i32 %a to double
- %2 = fadd double %1, 1.0
- %3 = fptoui double %2 to i32
- ret i32 %3
+; CHECK-LABEL: @simple4(
+; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[A:%.*]] to i64
+; CHECK-NEXT: [[T21:%.*]] = add i64 [[TMP1]], 1
+; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[T21]] to i32
+; CHECK-NEXT: ret i32 [[TMP2]]
+;
+ %t1 = uitofp i32 %a to double
+ %t2 = fadd double %t1, 1.0
+ %t3 = fptoui double %t2 to i32
+ ret i32 %t3
}
-; CHECK-LABEL: @simple5
-; CHECK: %1 = zext i8 %a to i32
-; CHECK: %2 = zext i8 %b to i32
-; CHECK: %3 = add i32 %1, 1
-; CHECK: %4 = mul i32 %3, %2
-; CHECK: ret i32 %4
define i32 @simple5(i8 %a, i8 %b) {
- %1 = uitofp i8 %a to float
- %2 = uitofp i8 %b to float
- %3 = fadd float %1, 1.0
- %4 = fmul float %3, %2
- %5 = fptoui float %4 to i32
- ret i32 %5
+; CHECK-LABEL: @simple5(
+; CHECK-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
+; CHECK-NEXT: [[TMP2:%.*]] = zext i8 [[B:%.*]] to i32
+; CHECK-NEXT: [[T31:%.*]] = add i32 [[TMP1]], 1
+; CHECK-NEXT: [[T42:%.*]] = mul i32 [[T31]], [[TMP2]]
+; CHECK-NEXT: ret i32 [[T42]]
+;
+ %t1 = uitofp i8 %a to float
+ %t2 = uitofp i8 %b to float
+ %t3 = fadd float %t1, 1.0
+ %t4 = fmul float %t3, %t2
+ %t5 = fptoui float %t4 to i32
+ ret i32 %t5
}
-; CHECK-LABEL: @simple6
-; CHECK: %1 = zext i8 %a to i32
-; CHECK: %2 = zext i8 %b to i32
-; CHECK: %3 = sub i32 0, %1
-; CHECK: %4 = mul i32 %3, %2
-; CHECK: ret i32 %4
define i32 @simple6(i8 %a, i8 %b) {
- %1 = uitofp i8 %a to float
- %2 = uitofp i8 %b to float
- %3 = fneg float %1
- %4 = fmul float %3, %2
- %5 = fptoui float %4 to i32
- ret i32 %5
+; CHECK-LABEL: @simple6(
+; CHECK-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
+; CHECK-NEXT: [[TMP2:%.*]] = zext i8 [[B:%.*]] to i32
+; CHECK-NEXT: [[T31:%.*]] = sub i32 0, [[TMP1]]
+; CHECK-NEXT: [[T42:%.*]] = mul i32 [[T31]], [[TMP2]]
+; CHECK-NEXT: ret i32 [[T42]]
+;
+ %t1 = uitofp i8 %a to float
+ %t2 = uitofp i8 %b to float
+ %t3 = fneg float %t1
+ %t4 = fmul float %t3, %t2
+ %t5 = fptoui float %t4 to i32
+ ret i32 %t5
}
; The two chains don't interact - failure of one shouldn't
; cause failure of the other.
-; CHECK-LABEL: @multi1
-; CHECK: %1 = zext i8 %a to i32
-; CHECK: %2 = zext i8 %b to i32
-; CHECK: %fc = uitofp i8 %c to float
-; CHECK: %x1 = add i32 %1, %2
-; CHECK: %z = fadd float %fc, %d
-; CHECK: %w = fptoui float %z to i32
-; CHECK: %r = add i32 %x1, %w
-; CHECK: ret i32 %r
define i32 @multi1(i8 %a, i8 %b, i8 %c, float %d) {
+; CHECK-LABEL: @multi1(
+; CHECK-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
+; CHECK-NEXT: [[TMP2:%.*]] = zext i8 [[B:%.*]] to i32
+; CHECK-NEXT: [[FC:%.*]] = uitofp i8 [[C:%.*]] to float
+; CHECK-NEXT: [[X1:%.*]] = add i32 [[TMP1]], [[TMP2]]
+; CHECK-NEXT: [[Z:%.*]] = fadd float [[FC]], [[D:%.*]]
+; CHECK-NEXT: [[W:%.*]] = fptoui float [[Z]] to i32
+; CHECK-NEXT: [[R:%.*]] = add i32 [[X1]], [[W]]
+; CHECK-NEXT: ret i32 [[R]]
+;
%fa = uitofp i8 %a to float
%fb = uitofp i8 %b to float
%fc = uitofp i8 %c to float
@@ -118,25 +127,27 @@ define i32 @multi1(i8 %a, i8 %b, i8 %c,
ret i32 %r
}
-; CHECK-LABEL: @simple_negzero
-; CHECK: %1 = zext i8 %a to i32
-; CHECK: %2 = add i32 %1, 0
-; CHECK: %3 = trunc i32 %2 to i16
-; CHECK: ret i16 %3
define i16 @simple_negzero(i8 %a) {
- %1 = uitofp i8 %a to float
- %2 = fadd fast float %1, -0.0
- %3 = fptoui float %2 to i16
- ret i16 %3
+; CHECK-LABEL: @simple_negzero(
+; CHECK-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
+; CHECK-NEXT: [[T21:%.*]] = add i32 [[TMP1]], 0
+; CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[T21]] to i16
+; CHECK-NEXT: ret i16 [[TMP2]]
+;
+ %t1 = uitofp i8 %a to float
+ %t2 = fadd fast float %t1, -0.0
+ %t3 = fptoui float %t2 to i16
+ ret i16 %t3
}
-; CHECK-LABEL: @simple_negative
-; CHECK: %1 = sext i8 %call to i32
-; CHECK: %mul1 = mul i32 %1, -3
-; CHECK: %2 = trunc i32 %mul1 to i8
-; CHECK: %conv3 = sext i8 %2 to i32
-; CHECK: ret i32 %conv3
define i32 @simple_negative(i8 %call) {
+; CHECK-LABEL: @simple_negative(
+; CHECK-NEXT: [[TMP1:%.*]] = sext i8 [[CALL:%.*]] to i32
+; CHECK-NEXT: [[MUL1:%.*]] = mul i32 [[TMP1]], -3
+; CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[MUL1]] to i8
+; CHECK-NEXT: [[CONV3:%.*]] = sext i8 [[TMP2]] to i32
+; CHECK-NEXT: ret i32 [[CONV3]]
+;
%conv1 = sitofp i8 %call to float
%mul = fmul float %conv1, -3.000000e+00
%conv2 = fptosi float %mul to i8
@@ -144,34 +155,37 @@ define i32 @simple_negative(i8 %call) {
ret i32 %conv3
}
-; CHECK-LABEL: @simple_fneg
-; CHECK: %1 = zext i8 %a to i32
-; CHECK: %2 = sub i32 0, %1
-; CHECK: %3 = trunc i32 %2 to i16
-; CHECK: ret i16 %3
define i16 @simple_fneg(i8 %a) {
- %1 = uitofp i8 %a to float
- %2 = fneg fast float %1
- %3 = fptoui float %2 to i16
- ret i16 %3
+; CHECK-LABEL: @simple_fneg(
+; CHECK-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
+; CHECK-NEXT: [[T21:%.*]] = sub i32 0, [[TMP1]]
+; CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[T21]] to i16
+; CHECK-NEXT: ret i16 [[TMP2]]
+;
+ %t1 = uitofp i8 %a to float
+ %t2 = fneg fast float %t1
+ %t3 = fptoui float %t2 to i16
+ ret i16 %t3
}
;
; Negative tests
;
-; CHECK-LABEL: @neg_multi1
-; CHECK: %fa = uitofp i8 %a to float
-; CHECK: %fc = uitofp i8 %c to float
-; CHECK: %x = fadd float %fa, %fc
-; CHECK: %y = fptoui float %x to i32
-; CHECK: %z = fadd float %fc, %d
-; CHECK: %w = fptoui float %z to i32
-; CHECK: %r = add i32 %y, %w
-; CHECK: ret i32 %r
; The two chains intersect, which means because one fails, no
; transform can occur.
+
define i32 @neg_multi1(i8 %a, i8 %b, i8 %c, float %d) {
+; CHECK-LABEL: @neg_multi1(
+; CHECK-NEXT: [[FA:%.*]] = uitofp i8 [[A:%.*]] to float
+; CHECK-NEXT: [[FC:%.*]] = uitofp i8 [[C:%.*]] to float
+; CHECK-NEXT: [[X:%.*]] = fadd float [[FA]], [[FC]]
+; CHECK-NEXT: [[Y:%.*]] = fptoui float [[X]] to i32
+; CHECK-NEXT: [[Z:%.*]] = fadd float [[FC]], [[D:%.*]]
+; CHECK-NEXT: [[W:%.*]] = fptoui float [[Z]] to i32
+; CHECK-NEXT: [[R:%.*]] = add i32 [[Y]], [[W]]
+; CHECK-NEXT: ret i32 [[R]]
+;
%fa = uitofp i8 %a to float
%fc = uitofp i8 %c to float
%x = fadd float %fa, %fc
@@ -182,15 +196,17 @@ define i32 @neg_multi1(i8 %a, i8 %b, i8
ret i32 %r
}
-; CHECK-LABEL: @neg_muld
-; CHECK: %fa = uitofp i32 %a to double
-; CHECK: %fb = uitofp i32 %b to double
-; CHECK: %mul = fmul double %fa, %fb
-; CHECK: %r = fptoui double %mul to i64
-; CHECK: ret i64 %r
; The i32 * i32 = i64, which has 64 bits, which is greater than the 52 bits
; that can be exactly represented in a double.
+
define i64 @neg_muld(i32 %a, i32 %b) {
+; CHECK-LABEL: @neg_muld(
+; CHECK-NEXT: [[FA:%.*]] = uitofp i32 [[A:%.*]] to double
+; CHECK-NEXT: [[FB:%.*]] = uitofp i32 [[B:%.*]] to double
+; CHECK-NEXT: [[MUL:%.*]] = fmul double [[FA]], [[FB]]
+; CHECK-NEXT: [[R:%.*]] = fptoui double [[MUL]] to i64
+; CHECK-NEXT: ret i64 [[R]]
+;
%fa = uitofp i32 %a to double
%fb = uitofp i32 %b to double
%mul = fmul double %fa, %fb
@@ -198,16 +214,18 @@ define i64 @neg_muld(i32 %a, i32 %b) {
ret i64 %r
}
-; CHECK-LABEL: @neg_mulf
-; CHECK: %fa = uitofp i16 %a to float
-; CHECK: %fb = uitofp i16 %b to float
-; CHECK: %mul = fmul float %fa, %fb
-; CHECK: %r = fptoui float %mul to i32
-; CHECK: ret i32 %r
; The i16 * i16 = i32, which can't be represented in a float, but can in a
; double. This should fail, as the written code uses floats, not doubles so
; the original result may be inaccurate.
+
define i32 @neg_mulf(i16 %a, i16 %b) {
+; CHECK-LABEL: @neg_mulf(
+; CHECK-NEXT: [[FA:%.*]] = uitofp i16 [[A:%.*]] to float
+; CHECK-NEXT: [[FB:%.*]] = uitofp i16 [[B:%.*]] to float
+; CHECK-NEXT: [[MUL:%.*]] = fmul float [[FA]], [[FB]]
+; CHECK-NEXT: [[R:%.*]] = fptoui float [[MUL]] to i32
+; CHECK-NEXT: ret i32 [[R]]
+;
%fa = uitofp i16 %a to float
%fb = uitofp i16 %b to float
%mul = fmul float %fa, %fb
@@ -215,80 +233,98 @@ define i32 @neg_mulf(i16 %a, i16 %b) {
ret i32 %r
}
-; CHECK-LABEL: @neg_cmp
-; CHECK: %1 = uitofp i8 %a to float
-; CHECK: %2 = uitofp i8 %b to float
-; CHECK: %3 = fcmp false float %1, %2
-; CHECK: ret i1 %3
; "false" doesn't have an icmp equivalent.
+
define i1 @neg_cmp(i8 %a, i8 %b) {
- %1 = uitofp i8 %a to float
- %2 = uitofp i8 %b to float
- %3 = fcmp false float %1, %2
- ret i1 %3
+; CHECK-LABEL: @neg_cmp(
+; CHECK-NEXT: [[T1:%.*]] = uitofp i8 [[A:%.*]] to float
+; CHECK-NEXT: [[T2:%.*]] = uitofp i8 [[B:%.*]] to float
+; CHECK-NEXT: [[T3:%.*]] = fcmp false float [[T1]], [[T2]]
+; CHECK-NEXT: ret i1 [[T3]]
+;
+ %t1 = uitofp i8 %a to float
+ %t2 = uitofp i8 %b to float
+ %t3 = fcmp false float %t1, %t2
+ ret i1 %t3
}
-; CHECK-LABEL: @neg_div
-; CHECK: %1 = uitofp i8 %a to float
-; CHECK: %2 = fdiv float %1, 1.0
-; CHECK: %3 = fptoui float %2 to i16
-; CHECK: ret i16 %3
; Division isn't a supported operator.
+
define i16 @neg_div(i8 %a) {
- %1 = uitofp i8 %a to float
- %2 = fdiv float %1, 1.0
- %3 = fptoui float %2 to i16
- ret i16 %3
+; CHECK-LABEL: @neg_div(
+; CHECK-NEXT: [[T1:%.*]] = uitofp i8 [[A:%.*]] to float
+; CHECK-NEXT: [[T2:%.*]] = fdiv float [[T1]], 1.000000e+00
+; CHECK-NEXT: [[T3:%.*]] = fptoui float [[T2]] to i16
+; CHECK-NEXT: ret i16 [[T3]]
+;
+ %t1 = uitofp i8 %a to float
+ %t2 = fdiv float %t1, 1.0
+ %t3 = fptoui float %t2 to i16
+ ret i16 %t3
}
-; CHECK-LABEL: @neg_remainder
-; CHECK: %1 = uitofp i8 %a to float
-; CHECK: %2 = fadd float %1, 1.2
-; CHECK: %3 = fptoui float %2 to i16
-; CHECK: ret i16 %3
; 1.2 is not an integer.
+
define i16 @neg_remainder(i8 %a) {
- %1 = uitofp i8 %a to float
- %2 = fadd float %1, 1.25
- %3 = fptoui float %2 to i16
- ret i16 %3
+; CHECK-LABEL: @neg_remainder(
+; CHECK-NEXT: [[T1:%.*]] = uitofp i8 [[A:%.*]] to float
+; CHECK-NEXT: [[T2:%.*]] = fadd float [[T1]], 1.250000e+00
+; CHECK-NEXT: [[T3:%.*]] = fptoui float [[T2]] to i16
+; CHECK-NEXT: ret i16 [[T3]]
+;
+ %t1 = uitofp i8 %a to float
+ %t2 = fadd float %t1, 1.25
+ %t3 = fptoui float %t2 to i16
+ ret i16 %t3
}
-; CHECK-LABEL: @neg_toolarge
-; CHECK: %1 = uitofp i80 %a to fp128
-; CHECK: %2 = fadd fp128 %1, %1
-; CHECK: %3 = fptoui fp128 %2 to i80
-; CHECK: ret i80 %3
; i80 > i64, which is the largest bitwidth handleable by default.
+
define i80 @neg_toolarge(i80 %a) {
- %1 = uitofp i80 %a to fp128
- %2 = fadd fp128 %1, %1
- %3 = fptoui fp128 %2 to i80
- ret i80 %3
+; CHECK-LABEL: @neg_toolarge(
+; CHECK-NEXT: [[T1:%.*]] = uitofp i80 [[A:%.*]] to fp128
+; CHECK-NEXT: [[T2:%.*]] = fadd fp128 [[T1]], [[T1]]
+; CHECK-NEXT: [[T3:%.*]] = fptoui fp128 [[T2]] to i80
+; CHECK-NEXT: ret i80 [[T3]]
+;
+ %t1 = uitofp i80 %a to fp128
+ %t2 = fadd fp128 %t1, %t1
+ %t3 = fptoui fp128 %t2 to i80
+ ret i80 %t3
}
-; CHECK-LABEL: @neg_calluser
-; CHECK: sitofp
-; CHECK: fcmp
-; The sequence %1..%3 cannot be converted because %4 uses %2.
+; The sequence %t1..%t3 cannot be converted because %t4 uses %t2.
+
define i32 @neg_calluser(i32 %value) {
- %1 = sitofp i32 %value to double
- %2 = fadd double %1, 1.0
- %3 = fcmp olt double %2, 0.000000e+00
- %4 = tail call double @g(double %2)
- %5 = fptosi double %4 to i32
- %6 = zext i1 %3 to i32
- %7 = add i32 %6, %5
- ret i32 %7
+; CHECK-LABEL: @neg_calluser(
+; CHECK-NEXT: [[T1:%.*]] = sitofp i32 [[VALUE:%.*]] to double
+; CHECK-NEXT: [[T2:%.*]] = fadd double [[T1]], 1.000000e+00
+; CHECK-NEXT: [[T3:%.*]] = fcmp olt double [[T2]], 0.000000e+00
+; CHECK-NEXT: [[T4:%.*]] = tail call double @g(double [[T2]])
+; CHECK-NEXT: [[T5:%.*]] = fptosi double [[T4]] to i32
+; CHECK-NEXT: [[T6:%.*]] = zext i1 [[T3]] to i32
+; CHECK-NEXT: [[T7:%.*]] = add i32 [[T6]], [[T5]]
+; CHECK-NEXT: ret i32 [[T7]]
+;
+ %t1 = sitofp i32 %value to double
+ %t2 = fadd double %t1, 1.0
+ %t3 = fcmp olt double %t2, 0.000000e+00
+ %t4 = tail call double @g(double %t2)
+ %t5 = fptosi double %t4 to i32
+ %t6 = zext i1 %t3 to i32
+ %t7 = add i32 %t6, %t5
+ ret i32 %t7
}
+
declare double @g(double)
-; CHECK-LABEL: @neg_vector
-; CHECK: %1 = uitofp <4 x i8> %a to <4 x float>
-; CHECK: %2 = fptoui <4 x float> %1 to <4 x i16>
-; CHECK: ret <4 x i16> %2
define <4 x i16> @neg_vector(<4 x i8> %a) {
- %1 = uitofp <4 x i8> %a to <4 x float>
- %2 = fptoui <4 x float> %1 to <4 x i16>
- ret <4 x i16> %2
+; CHECK-LABEL: @neg_vector(
+; CHECK-NEXT: [[T1:%.*]] = uitofp <4 x i8> [[A:%.*]] to <4 x float>
+; CHECK-NEXT: [[T2:%.*]] = fptoui <4 x float> [[T1]] to <4 x i16>
+; CHECK-NEXT: ret <4 x i16> [[T2]]
+;
+ %t1 = uitofp <4 x i8> %a to <4 x float>
+ %t2 = fptoui <4 x float> %t1 to <4 x i16>
+ ret <4 x i16> %t2
}
More information about the llvm-commits
mailing list