[llvm] r372153 - [X86] Simplify some code in LowerBUILD_VECTORvXi1. NFCI

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Tue Sep 17 11:02:46 PDT 2019


Author: ctopper
Date: Tue Sep 17 11:02:46 2019
New Revision: 372153

URL: http://llvm.org/viewvc/llvm-project?rev=372153&view=rev
Log:
[X86] Simplify some code in LowerBUILD_VECTORvXi1. NFCI

The case were Immediate is 0 and HasConstElts is true should never
happen since that would mean the constant elts were all zero. But
we check for all zero build vector earlier. So just use HasConstElts
and blindly take Immediate without checking if its 0.

Move the code that bitcasts and extract the immediate into the
the HasConstElts case since the other code just creates an undef
with the right type. No casting needed.

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=372153&r1=372152&r2=372153&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Sep 17 11:02:46 2019
@@ -8538,22 +8538,15 @@ static SDValue LowerBUILD_VECTORvXi1(SDV
 
   // insert elements one by one
   SDValue DstVec;
-  SDValue Imm;
-  if (Immediate) {
-    MVT ImmVT = MVT::getIntegerVT(std::max((int)VT.getSizeInBits(), 8));
-    Imm = DAG.getConstant(Immediate, dl, ImmVT);
-  }
-  else if (HasConstElts)
-    Imm = DAG.getConstant(0, dl, VT);
-  else
-    Imm = DAG.getUNDEF(VT);
-  if (Imm.getValueSizeInBits() == VT.getSizeInBits())
-    DstVec = DAG.getBitcast(VT, Imm);
-  else {
-    SDValue ExtVec = DAG.getBitcast(MVT::v8i1, Imm);
-    DstVec = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, ExtVec,
+  if (HasConstElts) {
+    MVT ImmVT = MVT::getIntegerVT(std::max(VT.getSizeInBits(), 8U));
+    SDValue Imm = DAG.getConstant(Immediate, dl, ImmVT);
+    MVT VecVT = VT.getSizeInBits() >= 8 ? VT : MVT::v8i1;
+    DstVec = DAG.getBitcast(VecVT, Imm);
+    DstVec = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, DstVec,
                          DAG.getIntPtrConstant(0, dl));
-  }
+  } else
+    DstVec = DAG.getUNDEF(VT);
 
   for (unsigned i = 0, e = NonConstIdx.size(); i != e; ++i) {
     unsigned InsertIdx = NonConstIdx[i];




More information about the llvm-commits mailing list