[llvm] r371955 - AMDGPU/GlobalISel: Remove illegal select tests
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Sun Sep 15 21:21:10 PDT 2019
Author: arsenm
Date: Sun Sep 15 21:21:10 2019
New Revision: 371955
URL: http://llvm.org/viewvc/llvm-project?rev=371955&view=rev
Log:
AMDGPU/GlobalISel: Remove illegal select tests
These fail in a release build.
Modified:
llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-constant.mir
Modified: llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-constant.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-constant.mir?rev=371955&r1=371954&r2=371955&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-constant.mir (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-constant.mir Sun Sep 15 21:21:10 2019
@@ -196,43 +196,6 @@ body: |
---
-name: load_constant_v3s32
-legalized: true
-regBankSelected: true
-tracksRegLiveness: true
-
-body: |
- bb.0:
- liveins: $sgpr0_sgpr1
-
- ; GFX6-LABEL: name: load_constant_v3s32
- ; GFX6: liveins: $sgpr0_sgpr1
- ; GFX6: [[COPY:%[0-9]+]]:sgpr(p4) = COPY $sgpr0_sgpr1
- ; GFX6: [[LOAD:%[0-9]+]]:sreg_96(<3 x s32>) = G_LOAD [[COPY]](p4) :: (load 12, align 4, addrspace 4)
- ; GFX6: $sgpr0_sgpr1_sgpr2 = COPY [[LOAD]](<3 x s32>)
- ; GFX7-LABEL: name: load_constant_v3s32
- ; GFX7: liveins: $sgpr0_sgpr1
- ; GFX7: [[COPY:%[0-9]+]]:sgpr(p4) = COPY $sgpr0_sgpr1
- ; GFX7: [[LOAD:%[0-9]+]]:sreg_96(<3 x s32>) = G_LOAD [[COPY]](p4) :: (load 12, align 4, addrspace 4)
- ; GFX7: $sgpr0_sgpr1_sgpr2 = COPY [[LOAD]](<3 x s32>)
- ; GFX8-LABEL: name: load_constant_v3s32
- ; GFX8: liveins: $sgpr0_sgpr1
- ; GFX8: [[COPY:%[0-9]+]]:sgpr(p4) = COPY $sgpr0_sgpr1
- ; GFX8: [[LOAD:%[0-9]+]]:sreg_96(<3 x s32>) = G_LOAD [[COPY]](p4) :: (load 12, align 4, addrspace 4)
- ; GFX8: $sgpr0_sgpr1_sgpr2 = COPY [[LOAD]](<3 x s32>)
- ; GFX10-LABEL: name: load_constant_v3s32
- ; GFX10: liveins: $sgpr0_sgpr1
- ; GFX10: [[COPY:%[0-9]+]]:sgpr(p4) = COPY $sgpr0_sgpr1
- ; GFX10: [[LOAD:%[0-9]+]]:sreg_96(<3 x s32>) = G_LOAD [[COPY]](p4) :: (load 12, align 4, addrspace 4)
- ; GFX10: $sgpr0_sgpr1_sgpr2 = COPY [[LOAD]](<3 x s32>)
- %0:sgpr(p4) = COPY $sgpr0_sgpr1
- %1:sgpr(<3 x s32>) = G_LOAD %0 :: (load 12, align 4, addrspace 4)
- $sgpr0_sgpr1_sgpr2 = COPY %1
-
-...
-
----
-
name: load_constant_v4s32_align4
legalized: true
regBankSelected: true
@@ -420,43 +383,6 @@ body: |
...
----
-
-name: load_constant_s96
-legalized: true
-regBankSelected: true
-tracksRegLiveness: true
-
-body: |
- bb.0:
- liveins: $sgpr0_sgpr1
-
- ; GFX6-LABEL: name: load_constant_s96
- ; GFX6: liveins: $sgpr0_sgpr1
- ; GFX6: [[COPY:%[0-9]+]]:sgpr(p4) = COPY $sgpr0_sgpr1
- ; GFX6: [[LOAD:%[0-9]+]]:sgpr(s96) = G_LOAD [[COPY]](p4) :: (load 12, align 4, addrspace 4)
- ; GFX6: $sgpr0_sgpr1_sgpr2 = COPY [[LOAD]](s96)
- ; GFX7-LABEL: name: load_constant_s96
- ; GFX7: liveins: $sgpr0_sgpr1
- ; GFX7: [[COPY:%[0-9]+]]:sgpr(p4) = COPY $sgpr0_sgpr1
- ; GFX7: [[LOAD:%[0-9]+]]:sreg_96(s96) = G_LOAD [[COPY]](p4) :: (load 12, align 4, addrspace 4)
- ; GFX7: $sgpr0_sgpr1_sgpr2 = COPY [[LOAD]](s96)
- ; GFX8-LABEL: name: load_constant_s96
- ; GFX8: liveins: $sgpr0_sgpr1
- ; GFX8: [[COPY:%[0-9]+]]:sgpr(p4) = COPY $sgpr0_sgpr1
- ; GFX8: [[LOAD:%[0-9]+]]:sreg_96(s96) = G_LOAD [[COPY]](p4) :: (load 12, align 4, addrspace 4)
- ; GFX8: $sgpr0_sgpr1_sgpr2 = COPY [[LOAD]](s96)
- ; GFX10-LABEL: name: load_constant_s96
- ; GFX10: liveins: $sgpr0_sgpr1
- ; GFX10: [[COPY:%[0-9]+]]:sgpr(p4) = COPY $sgpr0_sgpr1
- ; GFX10: [[LOAD:%[0-9]+]]:sreg_96(s96) = G_LOAD [[COPY]](p4) :: (load 12, align 4, addrspace 4)
- ; GFX10: $sgpr0_sgpr1_sgpr2 = COPY [[LOAD]](s96)
- %0:sgpr(p4) = COPY $sgpr0_sgpr1
- %1:sgpr(s96) = G_LOAD %0 :: (load 12, align 4, addrspace 4)
- $sgpr0_sgpr1_sgpr2 = COPY %1
-
-...
-
---
name: load_constant_s128_align4
More information about the llvm-commits
mailing list