[PATCH] D67600: AMDGPU/GlobalISel: Allow scc/vcc alternative mappings for s1 constants
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Sep 15 16:40:24 PDT 2019
arsenm created this revision.
arsenm added reviewers: tstellar, nhaehnle, kerbowa.
Herald added subscribers: Petar.Avramovic, t-tye, tpr, dstuttard, rovka, yaxunl, wdng, jvesely, kzhuravl.
https://reviews.llvm.org/D67600
Files:
lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
Index: lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
===================================================================
--- lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
+++ lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
@@ -339,7 +339,21 @@
InstructionMappings AltMappings;
switch (MI.getOpcode()) {
- case TargetOpcode::G_CONSTANT:
+ case TargetOpcode::G_CONSTANT: {
+ unsigned Size = getSizeInBits(MI.getOperand(0).getReg(), MRI, *TRI);
+ if (Size == 1) {
+ static const OpRegBankEntry<1> Table[4] = {
+ { { AMDGPU::VGPRRegBankID }, 1 },
+ { { AMDGPU::SGPRRegBankID }, 1 },
+ { { AMDGPU::VCCRegBankID }, 1 },
+ { { AMDGPU::SCCRegBankID }, 1 }
+ };
+
+ return addMappingFromTable<1>(MI, MRI, { 0 }, Table);
+ }
+
+ LLVM_FALLTHROUGH;
+ }
case TargetOpcode::G_FCONSTANT:
case TargetOpcode::G_FRAME_INDEX:
case TargetOpcode::G_GLOBAL_VALUE: {
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D67600.220264.patch
Type: text/x-patch
Size: 914 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20190915/3ff3507c/attachment.bin>
More information about the llvm-commits
mailing list