[PATCH] D67597: AMDGPU/GlobalISel: Avoid creating shift of 0 in arg lowering

[Matt Arsenault via Phabricator via llvm-commits]

arsenm created this revision.
arsenm added reviewers: tstellar, nhaehnle, kerbowa.
Herald added subscribers: Petar.Avramovic, t-tye, tpr, dstuttard, rovka, yaxunl, wdng, jvesely, kzhuravl.

This is sort of papering over the fact that we don't run a combiner
anywhere, but avoiding creating 2 instructions in the first place is
easy.


https://reviews.llvm.org/D67597

Files:
  lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
  test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workitem.id.ll


Index: test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workitem.id.ll
===================================================================
--- test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workitem.id.ll
+++ test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workitem.id.ll
@@ -89,7 +89,7 @@
 }
 
 ; ALL-LABEL: {{^}}test_workitem_id_x_func:
-; ALL: v_lshrrev_b32_e32 v2, 0, v2
+; ALL: s_waitcnt
 ; ALL-NEXT: v_and_b32_e32 v2, 0x3ff, v2
 define void @test_workitem_id_x_func(i32 addrspace(1)* %out) #1 {
   %id = call i32 @llvm.amdgcn.workitem.id.x()
Index: lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
===================================================================
--- lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+++ lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
@@ -1619,9 +1619,14 @@
     const unsigned Mask = Arg->getMask();
     const unsigned Shift = countTrailingZeros<unsigned>(Mask);
 
-    auto ShiftAmt = B.buildConstant(S32, Shift);
-    auto LShr = B.buildLShr(S32, LiveIn, ShiftAmt);
-    B.buildAnd(DstReg, LShr, B.buildConstant(S32, Mask >> Shift));
+    Register AndMaskSrc = LiveIn;
+
+    if (Shift != 0) {
+      auto ShiftAmt = B.buildConstant(S32, Shift);
+      AndMaskSrc = B.buildLShr(S32, LiveIn, ShiftAmt).getReg(0);
+    }
+
+    B.buildAnd(DstReg, AndMaskSrc, B.buildConstant(S32, Mask >> Shift));
   } else
     B.buildCopy(DstReg, LiveIn);
 


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D67597.220261.patch
Type: text/x-patch
Size: 1352 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20190915/fda766a0/attachment.bin>