[PATCH] D67259: [X86] Enable -mprefer-vector-width=256 by default for Skylake-avx512 and later Intel CPUs.
Diego Caballero via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sat Sep 14 15:09:22 PDT 2019
dcaballe added inline comments.
================
Comment at: llvm/docs/ReleaseNotes.rst:102
+ decrease in CPU frequency on these CPUs. This can be re-enabled by passing
+ -mprefer-vector-width=512 to clang or passing -mattr=-prefer-256-bit to llc.
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dcaballe wrote:
> Typo? "passing -mattr=-prefer-256-bit to llc" -> "passing -mattr=-prefer-512-bit to llc"?
Sorry, disregard my previous comment. I thought this was a dash, not a minus. If we do `-mattr=-prefer-256-bit`, is `prefer-512-bit` automatically set or is it not necessary?
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rL LLVM
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https://reviews.llvm.org/D67259/new/
https://reviews.llvm.org/D67259
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