[PATCH] D67574: AMDGPU: Fix an out of date assert in addressing FrameIndex
Changpeng Fang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Sep 13 15:01:53 PDT 2019
cfang created this revision.
cfang added a reviewer: arsenm.
Herald added subscribers: arphaman, t-tye, tpr, dstuttard, yaxunl, nhaehnle, wdng, jvesely, kzhuravl.
Should use StachPtrOffsetReg instead of FrameOffsetReg to address FrameIndex.
https://reviews.llvm.org/D67574
Files:
lib/Target/AMDGPU/SIRegisterInfo.cpp
test/CodeGen/AMDGPU/stack-pointer-offset-relative-frameindex.ll
Index: test/CodeGen/AMDGPU/stack-pointer-offset-relative-frameindex.ll
===================================================================
--- /dev/null
+++ test/CodeGen/AMDGPU/stack-pointer-offset-relative-frameindex.ll
@@ -0,0 +1,49 @@
+; RUN: llc < %s -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs | FileCheck -check-prefix=GCN
+
+; An assert was hit when frame offset register was used to address FrameIndex.
+
+%struct.KernelGlobals.10.44.61.78.112.514.530.610 = type { %struct.KernelData.8.42.59.76.110.512.528.608 addrspace(4)*, [8 x i8 addrspace(1)*], %struct.TextureInfo.9.43.60.77.111.513.529.609, %struct.TextureInfo.9.43.60.77.111.513.529.609, %struct.TextureInfo.9.43.60.77.111.513.529.609, %struct.TextureInfo.9.43.60.77.111.513.529.609, %struct.TextureInfo.9.43.60.77.111.513.529.609, %struct.TextureInfo.9.43.60.77.111.513.529.609, %struct.TextureInfo.9.43.60.77.111.513.529.609, %struct.TextureInfo.9.43.60.77.111.513.529.609, %struct.TextureInfo.9.43.60.77.111.513.529.609, %struct.TextureInfo.9.43.60.77.111.513.529.609, %struct.TextureInfo.9.43.60.77.111.513.529.609, %struct.TextureInfo.9.43.60.77.111.513.529.609, %struct.TextureInfo.9.43.60.77.111.513.529.609, %struct.TextureInfo.9.43.60.77.111.513.529.609, %struct.TextureInfo.9.43.60.77.111.513.529.609, %struct.TextureInfo.9.43.60.77.111.513.529.609, %struct.TextureInfo.9.43.60.77.111.513.529.609, %struct.TextureInfo.9.43.60.77.111.513.529.609, %struct.TextureInfo.9.43.60.77.111.513.529.609, %struct.TextureInfo.9.43.60.77.111.513.529.609, %struct.TextureInfo.9.43.60.77.111.513.529.609, %struct.TextureInfo.9.43.60.77.111.513.529.609, %struct.TextureInfo.9.43.60.77.111.513.529.609, %struct.TextureInfo.9.43.60.77.111.513.529.609, %struct.TextureInfo.9.43.60.77.111.513.529.609, %struct.TextureInfo.9.43.60.77.111.513.529.609, %struct.TextureInfo.9.43.60.77.111.513.529.609, %struct.TextureInfo.9.43.60.77.111.513.529.609, %struct.TextureInfo.9.43.60.77.111.513.529.609, %struct.TextureInfo.9.43.60.77.111.513.529.609, %struct.TextureInfo.9.43.60.77.111.513.529.609, %struct.TextureInfo.9.43.60.77.111.513.529.609, %struct.TextureInfo.9.43.60.77.111.513.529.609, %struct.TextureInfo.9.43.60.77.111.513.529.609, %struct.TextureInfo.9.43.60.77.111.513.529.609, %struct.TextureInfo.9.43.60.77.111.513.529.609, %struct.TextureInfo.9.43.60.77.111.513.529.609, %struct.TextureInfo.9.43.60.77.111.513.529.609, %struct.TextureInfo.9.43.60.77.111.513.529.609 }
+%struct.KernelData.8.42.59.76.110.512.528.608 = type { %struct.KernelCamera.2.36.53.70.104.506.522.602, %struct.KernelFilm.3.37.54.71.105.507.523.603, %struct.KernelBackground.4.38.55.72.106.508.524.604, %struct.KernelIntegrator.5.39.56.73.107.509.525.605, %struct.KernelBVH.6.40.57.74.108.510.526.606, %struct.KernelCurves.7.41.58.75.109.511.527.607, %struct.KernelCurves.7.41.58.75.109.511.527.607 }
+%struct.KernelCamera.2.36.53.70.104.506.522.602 = type { i32, i32, float, float, <4 x float>, float, float, float, float, %struct.Transform.0.34.51.68.102.504.520.600, %struct.DecomposedTransform.1.35.52.69.103.505.521.601, <4 x float>, <4 x float>, float, float, float, float, float, i32, i32, float, float, float, float, float, float, i32, float, i32, %struct.DecomposedTransform.1.35.52.69.103.505.521.601, %struct.DecomposedTransform.1.35.52.69.103.505.521.601, %struct.DecomposedTransform.1.35.52.69.103.505.521.601, %struct.DecomposedTransform.1.35.52.69.103.505.521.601, %struct.DecomposedTransform.1.35.52.69.103.505.521.601, %struct.DecomposedTransform.1.35.52.69.103.505.521.601, %struct.Transform.0.34.51.68.102.504.520.600, %struct.DecomposedTransform.1.35.52.69.103.505.521.601, %struct.DecomposedTransform.1.35.52.69.103.505.521.601, %struct.Transform.0.34.51.68.102.504.520.600, %struct.Transform.0.34.51.68.102.504.520.600, i32, i32, float, i32 }
+%struct.DecomposedTransform.1.35.52.69.103.505.521.601 = type { <4 x float>, <4 x float>, <4 x float>, <4 x float> }
+%struct.Transform.0.34.51.68.102.504.520.600 = type { <4 x float>, <4 x float>, <4 x float> }
+%struct.KernelFilm.3.37.54.71.105.507.523.603 = type { float, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, i32, float, i32, i32, i32, i32, i32, float, float, float, i32, i32, i32, <4 x float>, <4 x float>, <4 x float>, <4 x float> }
+%struct.KernelBackground.4.38.55.72.106.508.524.604 = type { i32, i32, i32, float, float, float, float, float }
+%struct.KernelIntegrator.5.39.56.73.107.509.525.605 = type { i32, i32, i32, i32, float, float, i32, i32, float, float, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, i32, float, float, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32 }
+%struct.KernelBVH.6.40.57.74.108.510.526.606 = type { i32, i32, i32, i32, i32, i32, i32, i32 }
+%struct.KernelCurves.7.41.58.75.109.511.527.607 = type { i32, i32, i32, i32 }
+%struct.TextureInfo.9.43.60.77.111.513.529.609 = type { i64, i32, i32, i32, i32, i32, i32 }
+%struct.ShaderData.14.48.65.82.116.518.534.614 = type { <3 x float>, <3 x float>, <3 x float>, <3 x float>, i32, i32, i32, i32, i32, float, float, i32, i32, float, float, %struct.differential3.11.45.62.79.113.515.531.611, %struct.differential3.11.45.62.79.113.515.531.611, %struct.differential.12.46.63.80.114.516.532.612, %struct.differential.12.46.63.80.114.516.532.612, <3 x float>, <3 x float>, <3 x float>, %struct.differential3.11.45.62.79.113.515.531.611, i32, i32, i32, float, <3 x float>, <3 x float>, <3 x float>, [64 x %struct.ShaderClosure.13.47.64.81.115.517.533.613] }
+%struct.differential.12.46.63.80.114.516.532.612 = type { float, float }
+%struct.differential3.11.45.62.79.113.515.531.611 = type { <3 x float>, <3 x float> }
+%struct.ShaderClosure.13.47.64.81.115.517.533.613 = type { <3 x float>, i32, float, <3 x float>, [10 x float], [8 x i8] }
+%struct.PathState.15.49.66.83.117.519.535.615 = type { i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, float, float, float }
+
+
+; GCN-LABEL: {{^}}kernel_background_evaluate:
+; GCN: s_endpgm
+define amdgpu_kernel void @kernel_background_evaluate(%struct.KernelGlobals.10.44.61.78.112.514.530.610 addrspace(5)* %kg, <4 x i32> addrspace(1)* %input, <4 x float> addrspace(1)* %output, i32 %i) {
+entry:
+ %sd = alloca %struct.ShaderData.14.48.65.82.116.518.534.614, align 16, addrspace(5)
+ %state = alloca %struct.PathState.15.49.66.83.117.519.535.615, align 4, addrspace(5)
+ call void @svm_eval_nodes(%struct.KernelGlobals.10.44.61.78.112.514.530.610 addrspace(5)* %kg, %struct.ShaderData.14.48.65.82.116.518.534.614 addrspace(5)* %sd, %struct.PathState.15.49.66.83.117.519.535.615 addrspace(5)* %state, i32 0, i32 4194304) #4
+ br i1 undef, label %shader_eval_surface.exit, label %if.then4.i
+
+if.then4.i: ; preds = %entry
+ %rng_hash.i.i = getelementptr inbounds %struct.PathState.15.49.66.83.117.519.535.615, %struct.PathState.15.49.66.83.117.519.535.615 addrspace(5)* %state, i32 0, i32 1
+ %tmp0 = load i32, i32 addrspace(5)* %rng_hash.i.i, align 4
+ %rng_offset.i.i = getelementptr inbounds %struct.PathState.15.49.66.83.117.519.535.615, %struct.PathState.15.49.66.83.117.519.535.615 addrspace(5)* %state, i32 0, i32 2
+ %tmp1 = load i32, i32 addrspace(5)* %rng_offset.i.i, align 4
+ %add.i.i = add i32 %tmp1, %tmp0
+ %add1.i.i = add i32 %add.i.i, 0
+ %mul.i.i.i.i = mul i32 %add1.i.i, 1103515245
+ %add.i.i.i.i = add i32 %mul.i.i.i.i, 12345
+ store i32 %add.i.i.i.i, i32 addrspace(5)* undef, align 16
+ unreachable
+
+shader_eval_surface.exit: ; preds = %entry
+ ret void
+}
+
+declare hidden float @_Z5clampfff(float, float, float) local_unnamed_addr
+declare hidden void @svm_eval_nodes(%struct.KernelGlobals.10.44.61.78.112.514.530.610 addrspace(5)*, %struct.ShaderData.14.48.65.82.116.518.534.614 addrspace(5)*, %struct.PathState.15.49.66.83.117.519.535.615 addrspace(5)*, i32, i32) local_unnamed_addr
Index: lib/Target/AMDGPU/SIRegisterInfo.cpp
===================================================================
--- lib/Target/AMDGPU/SIRegisterInfo.cpp
+++ lib/Target/AMDGPU/SIRegisterInfo.cpp
@@ -416,9 +416,8 @@
assert(FIOp && FIOp->isFI() && "frame index must be address operand");
assert(TII->isMUBUF(MI));
assert(TII->getNamedOperand(MI, AMDGPU::OpName::soffset)->getReg() ==
- MF->getInfo<SIMachineFunctionInfo>()->getFrameOffsetReg() &&
- "should only be seeing frame offset relative FrameIndex");
-
+ MF->getInfo<SIMachineFunctionInfo>()->getStackPtrOffsetReg() &&
+ "should only be seeing stack pointer offset relative FrameIndex");
MachineOperand *OffsetOp = TII->getNamedOperand(MI, AMDGPU::OpName::offset);
int64_t NewOffset = OffsetOp->getImm() + Offset;
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