[PATCH] D65649: [RISCV] Add MC encodings and tests of the Bit Manipulation extension

Paolo Savini via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Sep 13 03:25:21 PDT 2019


PaoloS marked 2 inline comments as done.
PaoloS added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoB.td:67
+
+class RVBInstR4Reg<bits<2> funct2, bits<3> funct3, RISCVOpcode opcode,
+                   string opcodestr, string argstr>
----------------
lewis-revill wrote:
> Is there an explanation for why this instruction is not re-using `RVInstR4` from `RISCVInstrFormats.td`?
Yes, that was because with RVInstR4 I couldn't use funct3 for encoding. As it is declared in `RISCVInstrFormats.td`:

```
class RVInstR4<bits<2> funct2, RISCVOpcode opcode, dag outs, dag ins,
               string opcodestr, string argstr>
    : RVInst<outs, ins, opcodestr, argstr, [], InstFormatR4> {
  bits<5> rs3;
  bits<5> rs2;
  bits<5> rs1;
  bits<3> funct3;
  bits<5> rd;

  let Inst{31-27} = rs3;
  let Inst{26-25} = funct2;
  let Inst{24-20} = rs2;
  let Inst{19-15} = rs1;
  let Inst{14-12} = funct3;
  let Inst{11-7} = rd;
  let Opcode = opcode.Value;
}
```
any parameter passed as funct3 would be ignored.
I opted for a new class that allows to use funct3 as an extra opcode field too. It would be good to consider that for the original RVInstR4 too though.


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  https://reviews.llvm.org/D65649/new/

https://reviews.llvm.org/D65649





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