[llvm] r371812 - AMDGPU/GlobalISel: Fix assert on multi-return side effect intrinsics
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Thu Sep 12 21:12:13 PDT 2019
Author: arsenm
Date: Thu Sep 12 21:12:12 2019
New Revision: 371812
URL: http://llvm.org/viewvc/llvm-project?rev=371812&view=rev
Log:
AMDGPU/GlobalISel: Fix assert on multi-return side effect intrinsics
llvm.amdgcn.else hits this.
Modified:
llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp?rev=371812&r1=371811&r2=371812&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp Thu Sep 12 21:12:12 2019
@@ -731,7 +731,7 @@ bool AMDGPUInstructionSelector::selectG_
MachineFunction *MF = BB->getParent();
MachineRegisterInfo &MRI = MF->getRegInfo();
- unsigned IntrinsicID = I.getOperand(0).getIntrinsicID();
+ unsigned IntrinsicID = I.getIntrinsicID();
switch (IntrinsicID) {
case Intrinsic::amdgcn_exp: {
int64_t Tgt = getConstant(MRI.getVRegDef(I.getOperand(1).getReg()));
More information about the llvm-commits
mailing list