[PATCH] D67510: [LV] Support gaps, overlaps, and inexact sizes in speculation logic

[Philip Reames via Phabricator via llvm-commits]

reames marked an inline comment as done.
reames added inline comments.


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Comment at: lib/Analysis/Loads.cpp:242
+  //   load i32, i32* <0,+,2>, align 2 (every 2 bytes, load a 4 byte chunk)
+  const APInt AccessSize = (TC-1) * StepC + EltSize;
 
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Ayal wrote:
> Note that interleave groups (of loads with positive step currently) with gaps at the end may benefit from checking dereferenceability across AccessSize of TC * StepC. But that warrants a separate patch.
I don't understand the case you're describing here.  What do you mean by a "gap at the end"?  

p.s. Is there a definition somewhere in code of what an interleave group is?  At the moment, I'm assuming it's an access pattern with periodic gaps, but is there something more specific?  


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D67510/new/

https://reviews.llvm.org/D67510