[PATCH] D51849: [RegisterCoalescer] Avoid "Use not jointly dominated by defs" in removePartialRedundancy
Jay Foad via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Sep 12 06:02:43 PDT 2019
foad added a comment.
Herald added a project: LLVM.
If I apply this now, the new test fails with:
*** Bad machine code: Too few operands ***
- function: _amdgpu_ps_main
- basic block: %bb.6 (0x53b7738)
- instruction: %8:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_IMM undef %9:sreg_128, 2708, 0 :: (dereferenceable invariant load 4)
5 operands expected, but 4 given.
Does this mean that the format of buffer load instructions has changed since you wrote this mir test?
Repository:
rL LLVM
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D51849/new/
https://reviews.llvm.org/D51849
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