[llvm] r371728 - [MIPS GlobalISel] Lower G_DYN_STACKALLOC

Petar Avramovic via llvm-commits llvm-commits at lists.llvm.org
Thu Sep 12 04:39:50 PDT 2019


Author: petar.avramovic
Date: Thu Sep 12 04:39:50 2019
New Revision: 371728

URL: http://llvm.org/viewvc/llvm-project?rev=371728&view=rev
Log:
[MIPS GlobalISel] Lower G_DYN_STACKALLOC

IRTranslator creates G_DYN_STACKALLOC instruction during expansion of
alloca when argument that tells number of elements to allocate on stack
is a virtual register. Use default lowering for MIPS32.

Differential Revision: https://reviews.llvm.org/D67440

Added:
    llvm/trunk/test/CodeGen/Mips/GlobalISel/legalizer/dyn_stackalloc.mir
    llvm/trunk/test/CodeGen/Mips/GlobalISel/llvm-ir/dyn_stackalloc.ll
Modified:
    llvm/trunk/lib/Target/Mips/MipsLegalizerInfo.cpp

Modified: llvm/trunk/lib/Target/Mips/MipsLegalizerInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsLegalizerInfo.cpp?rev=371728&r1=371727&r2=371728&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsLegalizerInfo.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsLegalizerInfo.cpp Thu Sep 12 04:39:50 2019
@@ -116,6 +116,9 @@ MipsLegalizerInfo::MipsLegalizerInfo(con
   getActionDefinitionsBuilder({G_GLOBAL_VALUE, G_JUMP_TABLE})
       .legalFor({p0});
 
+  getActionDefinitionsBuilder(G_DYN_STACKALLOC)
+      .lowerFor({{p0, s32}});
+
   // FP instructions
   getActionDefinitionsBuilder(G_FCONSTANT)
       .legalFor({s32, s64});

Added: llvm/trunk/test/CodeGen/Mips/GlobalISel/legalizer/dyn_stackalloc.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/GlobalISel/legalizer/dyn_stackalloc.mir?rev=371728&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/GlobalISel/legalizer/dyn_stackalloc.mir (added)
+++ llvm/trunk/test/CodeGen/Mips/GlobalISel/legalizer/dyn_stackalloc.mir Thu Sep 12 04:39:50 2019
@@ -0,0 +1,86 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
+--- |
+
+  declare i32 @puts(i8*)
+  declare void @llvm.memset.p0i8.i32(i8*, i8, i32, i1)
+
+  define void @Print_c_N_times(i8 %c, i32 %N) {
+  entry:
+    %add = add i32 %N, 1
+    %vla = alloca i8, i32 %add, align 1
+    call void @llvm.memset.p0i8.i32(i8* align 1 %vla, i8 %c, i32 %N, i1 false)
+    %arrayidx = getelementptr inbounds i8, i8* %vla, i32 %N
+    store i8 0, i8* %arrayidx, align 1
+    %call = call i32 @puts(i8* %vla)
+    ret void
+  }
+
+...
+---
+name:            Print_c_N_times
+alignment:       4
+tracksRegLiveness: true
+stack:
+  - { id: 0, name: vla, type: variable-sized, alignment: 1 }
+body:             |
+  bb.1.entry:
+    liveins: $a0, $a1
+
+    ; MIPS32-LABEL: name: Print_c_N_times
+    ; MIPS32: liveins: $a0, $a1
+    ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
+    ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
+    ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
+    ; MIPS32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
+    ; MIPS32: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY1]], [[C]]
+    ; MIPS32: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[ADD]], [[C]]
+    ; MIPS32: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 7
+    ; MIPS32: %8:_(s32) = nuw G_ADD [[MUL]], [[C2]]
+    ; MIPS32: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 -8
+    ; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND %8, [[C3]]
+    ; MIPS32: [[COPY2:%[0-9]+]]:_(p0) = COPY $sp
+    ; MIPS32: [[PTRTOINT:%[0-9]+]]:_(s32) = G_PTRTOINT [[COPY2]](p0)
+    ; MIPS32: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[PTRTOINT]], [[AND]]
+    ; MIPS32: [[INTTOPTR:%[0-9]+]]:_(p0) = G_INTTOPTR [[SUB]](s32)
+    ; MIPS32: $sp = COPY [[INTTOPTR]](p0)
+    ; MIPS32: [[COPY3:%[0-9]+]]:_(p0) = COPY [[INTTOPTR]](p0)
+    ; MIPS32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
+    ; MIPS32: $a0 = COPY [[COPY3]](p0)
+    ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
+    ; MIPS32: $a1 = COPY [[COPY4]](s32)
+    ; MIPS32: $a2 = COPY [[COPY1]](s32)
+    ; MIPS32: JAL &memset, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit $a2
+    ; MIPS32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
+    ; MIPS32: [[GEP:%[0-9]+]]:_(p0) = G_GEP [[COPY3]], [[COPY1]](s32)
+    ; MIPS32: [[COPY5:%[0-9]+]]:_(p0) = COPY [[GEP]](p0)
+    ; MIPS32: [[COPY6:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
+    ; MIPS32: G_STORE [[COPY6]](s32), [[COPY5]](p0) :: (store 1 into %ir.arrayidx)
+    ; MIPS32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
+    ; MIPS32: $a0 = COPY [[COPY3]](p0)
+    ; MIPS32: JAL @puts, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit-def $v0
+    ; MIPS32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
+    ; MIPS32: RetRA
+    %2:_(s32) = COPY $a0
+    %0:_(s8) = G_TRUNC %2(s32)
+    %1:_(s32) = COPY $a1
+    %3:_(s32) = G_CONSTANT i32 1
+    %13:_(s8) = G_CONSTANT i8 0
+    %4:_(s32) = G_ADD %1, %3
+    %5:_(s32) = G_MUL %4, %3
+    %6:_(s32) = G_CONSTANT i32 7
+    %7:_(s32) = nuw G_ADD %5, %6
+    %8:_(s32) = G_CONSTANT i32 -8
+    %9:_(s32) = G_AND %7, %8
+    %10:_(p0) = G_DYN_STACKALLOC %9(s32), 0
+    G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.memset), %10(p0), %0(s8), %1(s32) :: (store 1 into %ir.vla)
+    %11:_(p0) = G_GEP %10, %1(s32)
+    %12:_(p0) = COPY %11(p0)
+    G_STORE %13(s8), %12(p0) :: (store 1 into %ir.arrayidx)
+    ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
+    $a0 = COPY %10(p0)
+    JAL @puts, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit-def $v0
+    ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
+    RetRA
+
+...

Added: llvm/trunk/test/CodeGen/Mips/GlobalISel/llvm-ir/dyn_stackalloc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/GlobalISel/llvm-ir/dyn_stackalloc.ll?rev=371728&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/GlobalISel/llvm-ir/dyn_stackalloc.ll (added)
+++ llvm/trunk/test/CodeGen/Mips/GlobalISel/llvm-ir/dyn_stackalloc.ll Thu Sep 12 04:39:50 2019
@@ -0,0 +1,65 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc  -O0 -mtriple=mipsel-linux-gnu -global-isel  -verify-machineinstrs %s -o -| FileCheck %s -check-prefixes=MIPS32
+
+declare i32 @puts(i8*)
+declare void @llvm.memset.p0i8.i32(i8*, i8, i32, i1)
+
+define void @Print_c_N_times(i8 %c, i32 %N) {
+; MIPS32-LABEL: Print_c_N_times:
+; MIPS32:       # %bb.0: # %entry
+; MIPS32-NEXT:    addiu $sp, $sp, -32
+; MIPS32-NEXT:    .cfi_def_cfa_offset 32
+; MIPS32-NEXT:    sw $ra, 28($sp) # 4-byte Folded Spill
+; MIPS32-NEXT:    sw $fp, 24($sp) # 4-byte Folded Spill
+; MIPS32-NEXT:    .cfi_offset 31, -4
+; MIPS32-NEXT:    .cfi_offset 30, -8
+; MIPS32-NEXT:    move $fp, $sp
+; MIPS32-NEXT:    .cfi_def_cfa_register 30
+; MIPS32-NEXT:    ori $1, $zero, 1
+; MIPS32-NEXT:    ori $2, $zero, 0
+; MIPS32-NEXT:    addu $3, $5, $1
+; MIPS32-NEXT:    mul $1, $3, $1
+; MIPS32-NEXT:    ori $3, $zero, 7
+; MIPS32-NEXT:    addu $1, $1, $3
+; MIPS32-NEXT:    addiu $3, $zero, 65528
+; MIPS32-NEXT:    and $1, $1, $3
+; MIPS32-NEXT:    move $3, $sp
+; MIPS32-NEXT:    subu $1, $3, $1
+; MIPS32-NEXT:    move $sp, $1
+; MIPS32-NEXT:    addiu $sp, $sp, -16
+; MIPS32-NEXT:    sw $4, 20($fp) # 4-byte Folded Spill
+; MIPS32-NEXT:    move $4, $1
+; MIPS32-NEXT:    lw $3, 20($fp) # 4-byte Folded Reload
+; MIPS32-NEXT:    sw $5, 16($fp) # 4-byte Folded Spill
+; MIPS32-NEXT:    move $5, $3
+; MIPS32-NEXT:    lw $6, 16($fp) # 4-byte Folded Reload
+; MIPS32-NEXT:    sw $2, 12($fp) # 4-byte Folded Spill
+; MIPS32-NEXT:    sw $1, 8($fp) # 4-byte Folded Spill
+; MIPS32-NEXT:    jal memset
+; MIPS32-NEXT:    nop
+; MIPS32-NEXT:    addiu $sp, $sp, 16
+; MIPS32-NEXT:    lw $1, 8($fp) # 4-byte Folded Reload
+; MIPS32-NEXT:    lw $2, 16($fp) # 4-byte Folded Reload
+; MIPS32-NEXT:    addu $3, $1, $2
+; MIPS32-NEXT:    lw $4, 12($fp) # 4-byte Folded Reload
+; MIPS32-NEXT:    sb $4, 0($3)
+; MIPS32-NEXT:    addiu $sp, $sp, -16
+; MIPS32-NEXT:    move $4, $1
+; MIPS32-NEXT:    jal puts
+; MIPS32-NEXT:    nop
+; MIPS32-NEXT:    addiu $sp, $sp, 16
+; MIPS32-NEXT:    move $sp, $fp
+; MIPS32-NEXT:    lw $fp, 24($sp) # 4-byte Folded Reload
+; MIPS32-NEXT:    lw $ra, 28($sp) # 4-byte Folded Reload
+; MIPS32-NEXT:    addiu $sp, $sp, 32
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    nop
+entry:
+  %add = add i32 %N, 1
+  %vla = alloca i8, i32 %add, align 1
+  call void @llvm.memset.p0i8.i32(i8* align 1 %vla, i8 %c, i32 %N, i1 false)
+  %arrayidx = getelementptr inbounds i8, i8* %vla, i32 %N
+  store i8 0, i8* %arrayidx, align 1
+  %call = call i32 @puts(i8* %vla)
+  ret void
+}




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