[PATCH] D67448: LiveIntervals: Split live intervals on multiple dead defs

[Matt Arsenault via Phabricator via llvm-commits]

arsenm created this revision.
arsenm added reviewers: qcolombet, MatzeB.
Herald added subscribers: nhaehnle, wdng, jvesely.

If there are multiple dead defs of the same virtual register, these
are required to be split into multiple virtual registers with separate
live intervals to avoid a verifier error.


https://reviews.llvm.org/D67448

Files:
  lib/CodeGen/LiveIntervals.cpp
  test/CodeGen/AMDGPU/live-intervals-multiple-dead-defs.mir


Index: test/CodeGen/AMDGPU/live-intervals-multiple-dead-defs.mir
===================================================================
--- /dev/null
+++ test/CodeGen/AMDGPU/live-intervals-multiple-dead-defs.mir
@@ -0,0 +1,18 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx906 -verify-machineinstrs -run-pass=machine-scheduler -verify-misched -o - %s | FileCheck %s
+
+# There are multiple dead defs of the same virtual register. Make sure
+# the intervals are split during the initial live range computation.
+
+---
+name:            multiple_connected_components_dead
+tracksRegLiveness: true
+body:             |
+  bb.0:
+    ; CHECK-LABEL: name: multiple_connected_components_dead
+    ; CHECK: dead %1:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    ; CHECK: dead %0:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+    dead %0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    dead %0:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+
+...
Index: lib/CodeGen/LiveIntervals.cpp
===================================================================
--- lib/CodeGen/LiveIntervals.cpp
+++ lib/CodeGen/LiveIntervals.cpp
@@ -196,7 +196,11 @@
   assert(LI.empty() && "Should only compute empty intervals.");
   LRCalc->reset(MF, getSlotIndexes(), DomTree, &getVNInfoAllocator());
   LRCalc->calculate(LI, MRI->shouldTrackSubRegLiveness(LI.reg));
-  computeDeadValues(LI, nullptr);
+
+  if (computeDeadValues(LI, nullptr)) {
+    SmallVector<LiveInterval *, 4> SplitIntervals;
+    splitSeparateComponents(LI, SplitIntervals);
+  }
 }
 
 void LiveIntervals::computeVirtRegs() {
@@ -500,6 +504,8 @@
 bool LiveIntervals::computeDeadValues(LiveInterval &LI,
                                       SmallVectorImpl<MachineInstr*> *dead) {
   bool MayHaveSplitComponents = false;
+  bool HaveDeadDef = false;
+
   for (VNInfo *VNI : LI.valnos) {
     if (VNI->isUnused())
       continue;
@@ -530,6 +536,10 @@
       MachineInstr *MI = getInstructionFromIndex(Def);
       assert(MI && "No instruction defining live value");
       MI->addRegisterDead(LI.reg, TRI);
+      if (HaveDeadDef)
+        MayHaveSplitComponents = true;
+      HaveDeadDef = true;
+
       if (dead && MI->allDefsAreDead()) {
         LLVM_DEBUG(dbgs() << "All defs dead: " << Def << '\t' << *MI);
         dead->push_back(MI);


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