[PATCH] D67392: [ARM][ParallelDSP] Change smlad insertion order

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

> This can help reduce register pressure.

Is misched really so weak that this helps significantly?  Or is it not enabled for the targets in question?



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Comment at: lib/Target/ARM/ARMParallelDSP.cpp:696
+  llvm::sort(R.getMulPairs(), [this](auto &PairA, auto &PairB) {
+              return DT->dominates(PairA.first->Root, PairB.first->Root);
+             });
----------------
dominates() is linear in the length of the basic block; might want to use OrderedBasicBlock.  (This is probably not the only place where this pass is quadratic in the size of the basic block, but just happened to spot it.)


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  https://reviews.llvm.org/D67392/new/

https://reviews.llvm.org/D67392