[llvm] r371528 - [x86] add a test for BreakFalseDeps; NFC

[Sanjay Patel via llvm-commits]

Author: spatel
Date: Tue Sep 10 08:42:22 2019
New Revision: 371528

URL: http://llvm.org/viewvc/llvm-project?rev=371528&view=rev
Log:
[x86] add a test for BreakFalseDeps; NFC

As discussed in D67363

Modified:
    llvm/trunk/test/CodeGen/X86/sqrt-partial.ll

Modified: llvm/trunk/test/CodeGen/X86/sqrt-partial.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sqrt-partial.ll?rev=371528&r1=371527&r2=371528&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sqrt-partial.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sqrt-partial.ll Tue Sep 10 08:42:22 2019
@@ -85,6 +85,26 @@ define double @minsize(double %x, double
   ret double %t6
 }
 
+; Partial reg avoidance may involve register allocation
+; rather than adding an instruction.
+
+define double @partial_dep_minsize(double %x, double %y) minsize {
+; SSE-LABEL: partial_dep_minsize:
+; SSE:       # %bb.0:
+; SSE-NEXT:    sqrtsd %xmm1, %xmm0
+; SSE-NEXT:    addsd %xmm1, %xmm0
+; SSE-NEXT:    retq
+;
+; AVX-LABEL: partial_dep_minsize:
+; AVX:       # %bb.0:
+; AVX-NEXT:    vsqrtsd %xmm1, %xmm1, %xmm0
+; AVX-NEXT:    vaddsd %xmm1, %xmm0, %xmm0
+; AVX-NEXT:    retq
+  %t6 = tail call fast double @llvm.sqrt.f64(double %y)
+  %t = fadd fast double %t6, %y
+  ret double %t
+}
+
 declare float @sqrtf(float)
 declare double @sqrt(double)
 declare double @llvm.sqrt.f64(double)