[PATCH] D67397: [RISCV] Add MachineInstr immediate verification

Sam Elliott via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Sep 10 07:37:02 PDT 2019


lenary added a comment.

Is there a way to write a test for this? I realise any assembly goes through the parser, so will be caught before it hits this code. Is there another way of making this work? a MIR-based test?

The implementation looks good to me. I like that we haven't had to make any target-independent changes, and the implementation is fairly small.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D67397/new/

https://reviews.llvm.org/D67397





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