[PATCH] D61884: [RISCV] Support stack offset exceed 32-bit for RV64

[Shiva Chen via Phabricator via llvm-commits]

shiva0217 updated this revision to Diff 219481.
shiva0217 added reviewers: lenary, luismarques.
shiva0217 added a comment.

Using T1 as temp register for prologue/epilogue generation if there is no shrink wrapping optimization occur.


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D61884/new/

https://reviews.llvm.org/D61884

Files:
  lib/Target/RISCV/RISCVFrameLowering.cpp
  lib/Target/RISCV/RISCVInstrInfo.cpp
  lib/Target/RISCV/RISCVInstrInfo.h
  test/CodeGen/RISCV/large-stack.ll
  test/CodeGen/RISCV/rv64-large-stack.ll
  test/CodeGen/RISCV/stack-realignment.ll

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