[PATCH] D67306: [IfConversion] Correctly handle cases where analyzeBranch fails.

[Eli Friedman via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL371434: [IfConversion] Correctly handle cases where analyzeBranch fails. (authored by efriedma, committed by ).

Changed prior to commit:
  https://reviews.llvm.org/D67306?vs=219195&id=219400#toc

Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D67306/new/

https://reviews.llvm.org/D67306

Files:
  llvm/trunk/lib/CodeGen/IfConversion.cpp
  llvm/trunk/test/CodeGen/ARM/ifcvt-diamond-unanalyzable-common.mir


Index: llvm/trunk/test/CodeGen/ARM/ifcvt-diamond-unanalyzable-common.mir
===================================================================
--- llvm/trunk/test/CodeGen/ARM/ifcvt-diamond-unanalyzable-common.mir
+++ llvm/trunk/test/CodeGen/ARM/ifcvt-diamond-unanalyzable-common.mir
@@ -1,4 +1,4 @@
-# RUN: llc %s -o - -run-pass=if-converter | FileCheck %s
+# RUN: llc %s -o - -run-pass=if-converter -verify-machineinstrs | FileCheck %s
 # Make sure we correctly if-convert blocks containing an INLINEASM_BR.
 # CHECK: t2CMPri killed renamable $r2, 34
 # CHECK-NEXT: $r0 = t2MOVi 2, 1, $cpsr, $noreg
@@ -48,9 +48,8 @@
     t2B %bb.3, 14, $noreg
   
   bb.3:
-    successors: %bb.4(0x80000000)
-  
     INLINEASM &"", 1
+    $sp = t2LDMIA_RET $sp, 14, $noreg, def $r4, def $pc
   
   bb.4.l_yes (address-taken):
     $sp = t2LDMIA_RET $sp, 14, $noreg, def $r4, def $pc
Index: llvm/trunk/lib/CodeGen/IfConversion.cpp
===================================================================
--- llvm/trunk/lib/CodeGen/IfConversion.cpp
+++ llvm/trunk/lib/CodeGen/IfConversion.cpp
@@ -912,6 +912,12 @@
   BBI.BrCond.clear();
   BBI.IsBrAnalyzable =
       !TII->analyzeBranch(*BBI.BB, BBI.TrueBB, BBI.FalseBB, BBI.BrCond);
+  if (!BBI.IsBrAnalyzable) {
+    BBI.TrueBB = nullptr;
+    BBI.FalseBB = nullptr;
+    BBI.BrCond.clear();
+  }
+
   SmallVector<MachineOperand, 4> RevCond(BBI.BrCond.begin(), BBI.BrCond.end());
   BBI.IsBrReversible = (RevCond.size() == 0) ||
       !TII->reverseBranchCondition(RevCond);


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