[llvm] r371421 - Revert "[MachineCopyPropagation] Remove redundant copies after TailDup via machine-cp"

Dmitri Gribenko via llvm-commits llvm-commits at lists.llvm.org
Mon Sep 9 09:46:45 PDT 2019


Author: gribozavr
Date: Mon Sep  9 09:46:45 2019
New Revision: 371421

URL: http://llvm.org/viewvc/llvm-project?rev=371421&view=rev
Log:
Revert "[MachineCopyPropagation] Remove redundant copies after TailDup via machine-cp"

This reverts commit 371359. I'm suspecting a miscompile, I posted a
reproducer to https://reviews.llvm.org/D65267.

Modified:
    llvm/trunk/lib/CodeGen/MachineCopyPropagation.cpp
    llvm/trunk/test/CodeGen/PowerPC/redundant-copy-after-tail-dup.ll
    llvm/trunk/test/CodeGen/X86/mul-i512.ll
    llvm/trunk/test/CodeGen/X86/umulo-128-legalisation-lowering.ll

Modified: llvm/trunk/lib/CodeGen/MachineCopyPropagation.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineCopyPropagation.cpp?rev=371421&r1=371420&r2=371421&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineCopyPropagation.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineCopyPropagation.cpp Mon Sep  9 09:46:45 2019
@@ -68,7 +68,6 @@ using namespace llvm;
 
 STATISTIC(NumDeletes, "Number of dead copies deleted");
 STATISTIC(NumCopyForwards, "Number of copy uses forwarded");
-STATISTIC(NumCopyBackwardPropagated, "Number of copy defs backward propagated");
 DEBUG_COUNTER(FwdCounter, "machine-cp-fwd",
               "Controls which register COPYs are forwarded");
 
@@ -212,13 +211,11 @@ private:
   void ReadRegister(unsigned Reg, MachineInstr &Reader,
                     DebugType DT);
   void CopyPropagateBlock(MachineBasicBlock &MBB);
-  bool eraseIfRedundant(MachineInstr &Copy);
   bool eraseIfRedundant(MachineInstr &Copy, unsigned Src, unsigned Def);
   void forwardUses(MachineInstr &MI);
   bool isForwardableRegClassCopy(const MachineInstr &Copy,
                                  const MachineInstr &UseI, unsigned UseIdx);
   bool hasImplicitOverlap(const MachineInstr &MI, const MachineOperand &Use);
-  bool isSafeBackwardCopyPropagation(MachineInstr &Copy, MachineInstr &SrcMI);
 
   /// Candidates for deletion.
   SmallSetVector<MachineInstr *, 8> MaybeDeadCopies;
@@ -277,57 +274,6 @@ static bool isNopCopy(const MachineInstr
   return SubIdx == TRI->getSubRegIndex(PreviousDef, Def);
 }
 
-bool MachineCopyPropagation::isSafeBackwardCopyPropagation(
-    MachineInstr &Copy, MachineInstr &SrcMI) {
-  MachineOperand &SrcOp = SrcMI.getOperand(0);
-  if (!(SrcOp.isReg() && SrcOp.isDef() &&
-        SrcOp.getReg() == Copy.getOperand(1).getReg() && SrcOp.isRenamable() &&
-        !SrcOp.isTied() && !SrcOp.isImplicit() &&
-        !MRI->isReserved(SrcOp.getReg())))
-    return false;
-  if (const TargetRegisterClass *URC = SrcMI.getRegClassConstraint(0, TII, TRI))
-    return URC->contains(Copy.getOperand(0).getReg());
-  return false;
-}
-
-/// In a terminal BB, remove instruction \p Copy if \p Copy's src and dst are
-/// not used or defined between \p Copy and definition point of \p Copy's src.
-/// \p Copy's dst will be backward propagated to where \p Copy's src is defined.
-bool MachineCopyPropagation::eraseIfRedundant(MachineInstr &Copy) {
-  // Only take terminal BBs into account.
-  if (!Copy.getParent()->succ_empty())
-    return false;
-  if (!Copy.getOperand(1).isRenamable() || !Copy.getOperand(1).isKill())
-    return false;
-  unsigned Def = Copy.getOperand(0).getReg();
-  unsigned Src = Copy.getOperand(1).getReg();
-  if (MRI->isReserved(Src) || MRI->isReserved(Def))
-    return false;
-  MachineBasicBlock::reverse_iterator E = Copy.getParent()->rend(), It = Copy;
-  It++;
-  MachineInstr *SrcMI = nullptr;
-  for (; It != E; ++It) {
-    if (It->readsRegister(Src, TRI) || It->readsRegister(Def, TRI))
-      return false;
-    if (It->modifiesRegister(Def, TRI))
-      return false;
-    if (It->modifiesRegister(Src, TRI)) {
-      SrcMI = &*It;
-      break;
-    }
-  }
-  if (!SrcMI)
-    return false;
-  if (!isSafeBackwardCopyPropagation(Copy, *SrcMI))
-    return false;
-  SrcMI->getOperand(0).setReg(Def);
-  SrcMI->getOperand(0).setIsRenamable(Copy.getOperand(0).isRenamable());
-  Copy.eraseFromParent();
-  ++NumCopyBackwardPropagated;
-  ++NumDeletes;
-  return true;
-}
-
 /// Remove instruction \p Copy if there exists a previous copy that copies the
 /// register \p Src to the register \p Def; This may happen indirectly by
 /// copying the super registers.
@@ -529,17 +475,6 @@ void MachineCopyPropagation::CopyPropaga
              !Register::isVirtualRegister(Src) &&
              "MachineCopyPropagation should be run after register allocation!");
 
-      // In a terminal BB,
-      //  $reg0 = OP ...
-      //  ... <<< No uses of $reg0 and $reg1, no defs of $reg0 and $reg1
-      //  $reg1 = COPY $reg0 <<< $reg0 is killed
-      // =>
-      //  $reg1 = OP ...
-      //  ...
-      //  <RET>
-      if (eraseIfRedundant(*MI))
-        continue;
-
       // The two copies cancel out and the source of the first copy
       // hasn't been overridden, eliminate the second one. e.g.
       //  %ecx = COPY %eax

Modified: llvm/trunk/test/CodeGen/PowerPC/redundant-copy-after-tail-dup.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/redundant-copy-after-tail-dup.ll?rev=371421&r1=371420&r2=371421&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/redundant-copy-after-tail-dup.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/redundant-copy-after-tail-dup.ll Mon Sep  9 09:46:45 2019
@@ -26,7 +26,8 @@ define dso_local i1 @t(%class.A* %this,
 ; CHECK-P9-NEXT:    cmplwi r3, 2
 ; CHECK-P9-NEXT:    bge- cr0, .LBB0_6
 ; CHECK-P9-NEXT:  # %bb.3: # %land.lhs.true.1
-; CHECK-P9-NEXT:    li r3, 0
+; CHECK-P9-NEXT:    li r5, 0
+; CHECK-P9-NEXT:    mr r3, r5
 ; CHECK-P9-NEXT:    blr
 ; CHECK-P9-NEXT:  .LBB0_4: # %lor.lhs.false
 ; CHECK-P9-NEXT:    cmplwi cr0, r4, 0

Modified: llvm/trunk/test/CodeGen/X86/mul-i512.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mul-i512.ll?rev=371421&r1=371420&r2=371421&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mul-i512.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mul-i512.ll Mon Sep  9 09:46:45 2019
@@ -153,8 +153,9 @@ define void @test_512(i512* %a, i512* %b
 ; X32-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
 ; X32-NEXT:    adcl $0, %edx
 ; X32-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT:    movl 8(%ecx), %ebx
+; X32-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; X32-NEXT:    movl %esi, %ecx
+; X32-NEXT:    movl 8(%esi), %ebx
 ; X32-NEXT:    movl %ebx, %eax
 ; X32-NEXT:    movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
 ; X32-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload

Modified: llvm/trunk/test/CodeGen/X86/umulo-128-legalisation-lowering.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/umulo-128-legalisation-lowering.ll?rev=371421&r1=371420&r2=371421&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/umulo-128-legalisation-lowering.ll (original)
+++ llvm/trunk/test/CodeGen/X86/umulo-128-legalisation-lowering.ll Mon Sep  9 09:46:45 2019
@@ -98,8 +98,8 @@ define { i128, i8 } @muloti_test(i128 %l
 ; X86-NEXT:    addl %esi, %ecx
 ; X86-NEXT:    adcl $0, %ebp
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT:    movl {{[0-9]+}}(%esp), %edx
-; X86-NEXT:    mull %edx
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT:    mull %esi
 ; X86-NEXT:    movl %edx, %esi
 ; X86-NEXT:    addl %ecx, %eax
 ; X86-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill




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