[PATCH] D67284: [LLD][ELF][ARM] Implement --fix-cortex-a8 to fix erratum 657417
Rui Ueyama via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 9 05:57:25 PDT 2019
ruiu added a comment.
I'm halfway through reviewing it, and it looks like a straightforward implementation of a mitigation. Can I ask a (perhaps noob) question? If a CPU can be locked up by an instruction sequence that triggers the bug, and if the CPU is used by Android, does that mean a user application can lock up the entire system?
================
Comment at: ELF/ARMErrataFix.cpp:42
+// - There is a 32-bit Thumb-2 branch instruction with an address of the form
+// xxxxxxFFE. The first 2 bytes of the instruction are in 4KiB region 1, the
+// second 2 bytes are in region 2.
----------------
MaskRay wrote:
> What are "region 1" and "region 2"?
I guess that means first page and second page?
================
Comment at: ELF/ARMErrataFix.cpp:372-375
+ if (a->outSecOff == b->outSecOff && isa<Patch657417Section>(a) &&
+ !isa<Patch657417Section>(b))
+ return true;
+ return false;
----------------
You can return the result of the if condition directly.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D67284/new/
https://reviews.llvm.org/D67284
More information about the llvm-commits
mailing list