[llvm] r371356 - [X86] Add avx and avx512f RUN lines to fp128-cast.ll
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Sun Sep 8 18:34:55 PDT 2019
Author: ctopper
Date: Sun Sep 8 18:34:55 2019
New Revision: 371356
URL: http://llvm.org/viewvc/llvm-project?rev=371356&view=rev
Log:
[X86] Add avx and avx512f RUN lines to fp128-cast.ll
Modified:
llvm/trunk/test/CodeGen/X86/fp128-cast.ll
Modified: llvm/trunk/test/CodeGen/X86/fp128-cast.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fp128-cast.ll?rev=371356&r1=371355&r2=371356&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fp128-cast.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fp128-cast.ll Sun Sep 8 18:34:55 2019
@@ -1,7 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -O2 -mtriple=x86_64-linux-android -mattr=+sse | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -O2 -mtriple=x86_64-linux-gnu -mattr=+sse | FileCheck %s --check-prefix=X64
+; RUN: llc < %s -O2 -mtriple=x86_64-linux-android -mattr=+sse | FileCheck %s --check-prefixes=X64,X64-SSE
+; RUN: llc < %s -O2 -mtriple=x86_64-linux-gnu -mattr=+sse | FileCheck %s --check-prefixes=X64,X64-SSE
; RUN: llc < %s -O2 -mtriple=i686-linux-gnu -mattr=+mmx | FileCheck %s --check-prefix=X32
+; RUN: llc < %s -O2 -mtriple=x86_64-linux-android -mattr=+avx | FileCheck %s --check-prefixes=X64,X64-AVX
+; RUN: llc < %s -O2 -mtriple=x86_64-linux-gnu -mattr=+avx | FileCheck %s --check-prefixes=X64,X64-AVX
+; RUN: llc < %s -O2 -mtriple=x86_64-linux-android -mattr=+avx512f | FileCheck %s --check-prefixes=X64,X64-AVX
+; RUN: llc < %s -O2 -mtriple=x86_64-linux-gnu -mattr=+avx512f | FileCheck %s --check-prefixes=X64,X64-AVX
; Check soft floating point conversion function calls.
@@ -15,14 +19,14 @@
@vf128 = common global fp128 0xL00000000000000000000000000000000, align 16
define void @TestFPExtF32_F128() nounwind {
-; X64-LABEL: TestFPExtF32_F128:
-; X64: # %bb.0: # %entry
-; X64-NEXT: pushq %rax
-; X64-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
-; X64-NEXT: callq __extendsftf2
-; X64-NEXT: movaps %xmm0, {{.*}}(%rip)
-; X64-NEXT: popq %rax
-; X64-NEXT: retq
+; X64-SSE-LABEL: TestFPExtF32_F128:
+; X64-SSE: # %bb.0: # %entry
+; X64-SSE-NEXT: pushq %rax
+; X64-SSE-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; X64-SSE-NEXT: callq __extendsftf2
+; X64-SSE-NEXT: movaps %xmm0, {{.*}}(%rip)
+; X64-SSE-NEXT: popq %rax
+; X64-SSE-NEXT: retq
;
; X32-LABEL: TestFPExtF32_F128:
; X32: # %bb.0: # %entry
@@ -45,6 +49,15 @@ define void @TestFPExtF32_F128() nounwin
; X32-NEXT: addl $24, %esp
; X32-NEXT: popl %esi
; X32-NEXT: retl
+;
+; X64-AVX-LABEL: TestFPExtF32_F128:
+; X64-AVX: # %bb.0: # %entry
+; X64-AVX-NEXT: pushq %rax
+; X64-AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; X64-AVX-NEXT: callq __extendsftf2
+; X64-AVX-NEXT: vmovaps %xmm0, {{.*}}(%rip)
+; X64-AVX-NEXT: popq %rax
+; X64-AVX-NEXT: retq
entry:
%0 = load float, float* @vf32, align 4
%conv = fpext float %0 to fp128
@@ -53,14 +66,14 @@ entry:
}
define void @TestFPExtF64_F128() nounwind {
-; X64-LABEL: TestFPExtF64_F128:
-; X64: # %bb.0: # %entry
-; X64-NEXT: pushq %rax
-; X64-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
-; X64-NEXT: callq __extenddftf2
-; X64-NEXT: movaps %xmm0, {{.*}}(%rip)
-; X64-NEXT: popq %rax
-; X64-NEXT: retq
+; X64-SSE-LABEL: TestFPExtF64_F128:
+; X64-SSE: # %bb.0: # %entry
+; X64-SSE-NEXT: pushq %rax
+; X64-SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X64-SSE-NEXT: callq __extenddftf2
+; X64-SSE-NEXT: movaps %xmm0, {{.*}}(%rip)
+; X64-SSE-NEXT: popq %rax
+; X64-SSE-NEXT: retq
;
; X32-LABEL: TestFPExtF64_F128:
; X32: # %bb.0: # %entry
@@ -83,6 +96,15 @@ define void @TestFPExtF64_F128() nounwin
; X32-NEXT: addl $40, %esp
; X32-NEXT: popl %esi
; X32-NEXT: retl
+;
+; X64-AVX-LABEL: TestFPExtF64_F128:
+; X64-AVX: # %bb.0: # %entry
+; X64-AVX-NEXT: pushq %rax
+; X64-AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+; X64-AVX-NEXT: callq __extenddftf2
+; X64-AVX-NEXT: vmovaps %xmm0, {{.*}}(%rip)
+; X64-AVX-NEXT: popq %rax
+; X64-AVX-NEXT: retq
entry:
%0 = load double, double* @vf64, align 8
%conv = fpext double %0 to fp128
@@ -91,15 +113,15 @@ entry:
}
define void @TestFPExtF80_F128() nounwind {
-; X64-LABEL: TestFPExtF80_F128:
-; X64: # %bb.0: # %entry
-; X64-NEXT: subq $24, %rsp
-; X64-NEXT: fldt {{.*}}(%rip)
-; X64-NEXT: fstpt (%rsp)
-; X64-NEXT: callq __extendxftf2
-; X64-NEXT: movaps %xmm0, {{.*}}(%rip)
-; X64-NEXT: addq $24, %rsp
-; X64-NEXT: retq
+; X64-SSE-LABEL: TestFPExtF80_F128:
+; X64-SSE: # %bb.0: # %entry
+; X64-SSE-NEXT: subq $24, %rsp
+; X64-SSE-NEXT: fldt {{.*}}(%rip)
+; X64-SSE-NEXT: fstpt (%rsp)
+; X64-SSE-NEXT: callq __extendxftf2
+; X64-SSE-NEXT: movaps %xmm0, {{.*}}(%rip)
+; X64-SSE-NEXT: addq $24, %rsp
+; X64-SSE-NEXT: retq
;
; X32-LABEL: TestFPExtF80_F128:
; X32: # %bb.0: # %entry
@@ -122,6 +144,16 @@ define void @TestFPExtF80_F128() nounwin
; X32-NEXT: addl $40, %esp
; X32-NEXT: popl %esi
; X32-NEXT: retl
+;
+; X64-AVX-LABEL: TestFPExtF80_F128:
+; X64-AVX: # %bb.0: # %entry
+; X64-AVX-NEXT: subq $24, %rsp
+; X64-AVX-NEXT: fldt {{.*}}(%rip)
+; X64-AVX-NEXT: fstpt (%rsp)
+; X64-AVX-NEXT: callq __extendxftf2
+; X64-AVX-NEXT: vmovaps %xmm0, {{.*}}(%rip)
+; X64-AVX-NEXT: addq $24, %rsp
+; X64-AVX-NEXT: retq
entry:
%0 = load x86_fp80, x86_fp80* @vf80, align 8
%conv = fpext x86_fp80 %0 to fp128
@@ -130,14 +162,14 @@ entry:
}
define void @TestFPToSIF128_I32() nounwind {
-; X64-LABEL: TestFPToSIF128_I32:
-; X64: # %bb.0: # %entry
-; X64-NEXT: pushq %rax
-; X64-NEXT: movaps {{.*}}(%rip), %xmm0
-; X64-NEXT: callq __fixtfsi
-; X64-NEXT: movl %eax, {{.*}}(%rip)
-; X64-NEXT: popq %rax
-; X64-NEXT: retq
+; X64-SSE-LABEL: TestFPToSIF128_I32:
+; X64-SSE: # %bb.0: # %entry
+; X64-SSE-NEXT: pushq %rax
+; X64-SSE-NEXT: movaps {{.*}}(%rip), %xmm0
+; X64-SSE-NEXT: callq __fixtfsi
+; X64-SSE-NEXT: movl %eax, {{.*}}(%rip)
+; X64-SSE-NEXT: popq %rax
+; X64-SSE-NEXT: retq
;
; X32-LABEL: TestFPToSIF128_I32:
; X32: # %bb.0: # %entry
@@ -151,6 +183,15 @@ define void @TestFPToSIF128_I32() nounwi
; X32-NEXT: movl %eax, vi32
; X32-NEXT: addl $12, %esp
; X32-NEXT: retl
+;
+; X64-AVX-LABEL: TestFPToSIF128_I32:
+; X64-AVX: # %bb.0: # %entry
+; X64-AVX-NEXT: pushq %rax
+; X64-AVX-NEXT: vmovaps {{.*}}(%rip), %xmm0
+; X64-AVX-NEXT: callq __fixtfsi
+; X64-AVX-NEXT: movl %eax, {{.*}}(%rip)
+; X64-AVX-NEXT: popq %rax
+; X64-AVX-NEXT: retq
entry:
%0 = load fp128, fp128* @vf128, align 16
%conv = fptosi fp128 %0 to i32
@@ -159,14 +200,14 @@ entry:
}
define void @TestFPToUIF128_U32() nounwind {
-; X64-LABEL: TestFPToUIF128_U32:
-; X64: # %bb.0: # %entry
-; X64-NEXT: pushq %rax
-; X64-NEXT: movaps {{.*}}(%rip), %xmm0
-; X64-NEXT: callq __fixunstfsi
-; X64-NEXT: movl %eax, {{.*}}(%rip)
-; X64-NEXT: popq %rax
-; X64-NEXT: retq
+; X64-SSE-LABEL: TestFPToUIF128_U32:
+; X64-SSE: # %bb.0: # %entry
+; X64-SSE-NEXT: pushq %rax
+; X64-SSE-NEXT: movaps {{.*}}(%rip), %xmm0
+; X64-SSE-NEXT: callq __fixunstfsi
+; X64-SSE-NEXT: movl %eax, {{.*}}(%rip)
+; X64-SSE-NEXT: popq %rax
+; X64-SSE-NEXT: retq
;
; X32-LABEL: TestFPToUIF128_U32:
; X32: # %bb.0: # %entry
@@ -180,6 +221,15 @@ define void @TestFPToUIF128_U32() nounwi
; X32-NEXT: movl %eax, vu32
; X32-NEXT: addl $12, %esp
; X32-NEXT: retl
+;
+; X64-AVX-LABEL: TestFPToUIF128_U32:
+; X64-AVX: # %bb.0: # %entry
+; X64-AVX-NEXT: pushq %rax
+; X64-AVX-NEXT: vmovaps {{.*}}(%rip), %xmm0
+; X64-AVX-NEXT: callq __fixunstfsi
+; X64-AVX-NEXT: movl %eax, {{.*}}(%rip)
+; X64-AVX-NEXT: popq %rax
+; X64-AVX-NEXT: retq
entry:
%0 = load fp128, fp128* @vf128, align 16
%conv = fptoui fp128 %0 to i32
@@ -188,15 +238,15 @@ entry:
}
define void @TestFPToSIF128_I64() nounwind {
-; X64-LABEL: TestFPToSIF128_I64:
-; X64: # %bb.0: # %entry
-; X64-NEXT: pushq %rax
-; X64-NEXT: movaps {{.*}}(%rip), %xmm0
-; X64-NEXT: callq __fixtfsi
-; X64-NEXT: cltq
-; X64-NEXT: movq %rax, {{.*}}(%rip)
-; X64-NEXT: popq %rax
-; X64-NEXT: retq
+; X64-SSE-LABEL: TestFPToSIF128_I64:
+; X64-SSE: # %bb.0: # %entry
+; X64-SSE-NEXT: pushq %rax
+; X64-SSE-NEXT: movaps {{.*}}(%rip), %xmm0
+; X64-SSE-NEXT: callq __fixtfsi
+; X64-SSE-NEXT: cltq
+; X64-SSE-NEXT: movq %rax, {{.*}}(%rip)
+; X64-SSE-NEXT: popq %rax
+; X64-SSE-NEXT: retq
;
; X32-LABEL: TestFPToSIF128_I64:
; X32: # %bb.0: # %entry
@@ -212,6 +262,16 @@ define void @TestFPToSIF128_I64() nounwi
; X32-NEXT: movl %eax, vi64+4
; X32-NEXT: addl $12, %esp
; X32-NEXT: retl
+;
+; X64-AVX-LABEL: TestFPToSIF128_I64:
+; X64-AVX: # %bb.0: # %entry
+; X64-AVX-NEXT: pushq %rax
+; X64-AVX-NEXT: vmovaps {{.*}}(%rip), %xmm0
+; X64-AVX-NEXT: callq __fixtfsi
+; X64-AVX-NEXT: cltq
+; X64-AVX-NEXT: movq %rax, {{.*}}(%rip)
+; X64-AVX-NEXT: popq %rax
+; X64-AVX-NEXT: retq
entry:
%0 = load fp128, fp128* @vf128, align 16
%conv = fptosi fp128 %0 to i32
@@ -221,15 +281,15 @@ entry:
}
define void @TestFPToUIF128_U64() nounwind {
-; X64-LABEL: TestFPToUIF128_U64:
-; X64: # %bb.0: # %entry
-; X64-NEXT: pushq %rax
-; X64-NEXT: movaps {{.*}}(%rip), %xmm0
-; X64-NEXT: callq __fixunstfsi
-; X64-NEXT: movl %eax, %eax
-; X64-NEXT: movq %rax, {{.*}}(%rip)
-; X64-NEXT: popq %rax
-; X64-NEXT: retq
+; X64-SSE-LABEL: TestFPToUIF128_U64:
+; X64-SSE: # %bb.0: # %entry
+; X64-SSE-NEXT: pushq %rax
+; X64-SSE-NEXT: movaps {{.*}}(%rip), %xmm0
+; X64-SSE-NEXT: callq __fixunstfsi
+; X64-SSE-NEXT: movl %eax, %eax
+; X64-SSE-NEXT: movq %rax, {{.*}}(%rip)
+; X64-SSE-NEXT: popq %rax
+; X64-SSE-NEXT: retq
;
; X32-LABEL: TestFPToUIF128_U64:
; X32: # %bb.0: # %entry
@@ -244,6 +304,16 @@ define void @TestFPToUIF128_U64() nounwi
; X32-NEXT: movl $0, vu64+4
; X32-NEXT: addl $12, %esp
; X32-NEXT: retl
+;
+; X64-AVX-LABEL: TestFPToUIF128_U64:
+; X64-AVX: # %bb.0: # %entry
+; X64-AVX-NEXT: pushq %rax
+; X64-AVX-NEXT: vmovaps {{.*}}(%rip), %xmm0
+; X64-AVX-NEXT: callq __fixunstfsi
+; X64-AVX-NEXT: movl %eax, %eax
+; X64-AVX-NEXT: movq %rax, {{.*}}(%rip)
+; X64-AVX-NEXT: popq %rax
+; X64-AVX-NEXT: retq
entry:
%0 = load fp128, fp128* @vf128, align 16
%conv = fptoui fp128 %0 to i32
@@ -253,14 +323,14 @@ entry:
}
define void @TestFPTruncF128_F32() nounwind {
-; X64-LABEL: TestFPTruncF128_F32:
-; X64: # %bb.0: # %entry
-; X64-NEXT: pushq %rax
-; X64-NEXT: movaps {{.*}}(%rip), %xmm0
-; X64-NEXT: callq __trunctfsf2
-; X64-NEXT: movss %xmm0, {{.*}}(%rip)
-; X64-NEXT: popq %rax
-; X64-NEXT: retq
+; X64-SSE-LABEL: TestFPTruncF128_F32:
+; X64-SSE: # %bb.0: # %entry
+; X64-SSE-NEXT: pushq %rax
+; X64-SSE-NEXT: movaps {{.*}}(%rip), %xmm0
+; X64-SSE-NEXT: callq __trunctfsf2
+; X64-SSE-NEXT: movss %xmm0, {{.*}}(%rip)
+; X64-SSE-NEXT: popq %rax
+; X64-SSE-NEXT: retq
;
; X32-LABEL: TestFPTruncF128_F32:
; X32: # %bb.0: # %entry
@@ -274,6 +344,15 @@ define void @TestFPTruncF128_F32() nounw
; X32-NEXT: fstps vf32
; X32-NEXT: addl $12, %esp
; X32-NEXT: retl
+;
+; X64-AVX-LABEL: TestFPTruncF128_F32:
+; X64-AVX: # %bb.0: # %entry
+; X64-AVX-NEXT: pushq %rax
+; X64-AVX-NEXT: vmovaps {{.*}}(%rip), %xmm0
+; X64-AVX-NEXT: callq __trunctfsf2
+; X64-AVX-NEXT: vmovss %xmm0, {{.*}}(%rip)
+; X64-AVX-NEXT: popq %rax
+; X64-AVX-NEXT: retq
entry:
%0 = load fp128, fp128* @vf128, align 16
%conv = fptrunc fp128 %0 to float
@@ -282,14 +361,14 @@ entry:
}
define void @TestFPTruncF128_F64() nounwind {
-; X64-LABEL: TestFPTruncF128_F64:
-; X64: # %bb.0: # %entry
-; X64-NEXT: pushq %rax
-; X64-NEXT: movaps {{.*}}(%rip), %xmm0
-; X64-NEXT: callq __trunctfdf2
-; X64-NEXT: movsd %xmm0, {{.*}}(%rip)
-; X64-NEXT: popq %rax
-; X64-NEXT: retq
+; X64-SSE-LABEL: TestFPTruncF128_F64:
+; X64-SSE: # %bb.0: # %entry
+; X64-SSE-NEXT: pushq %rax
+; X64-SSE-NEXT: movaps {{.*}}(%rip), %xmm0
+; X64-SSE-NEXT: callq __trunctfdf2
+; X64-SSE-NEXT: movsd %xmm0, {{.*}}(%rip)
+; X64-SSE-NEXT: popq %rax
+; X64-SSE-NEXT: retq
;
; X32-LABEL: TestFPTruncF128_F64:
; X32: # %bb.0: # %entry
@@ -303,6 +382,15 @@ define void @TestFPTruncF128_F64() nounw
; X32-NEXT: fstpl vf64
; X32-NEXT: addl $12, %esp
; X32-NEXT: retl
+;
+; X64-AVX-LABEL: TestFPTruncF128_F64:
+; X64-AVX: # %bb.0: # %entry
+; X64-AVX-NEXT: pushq %rax
+; X64-AVX-NEXT: vmovaps {{.*}}(%rip), %xmm0
+; X64-AVX-NEXT: callq __trunctfdf2
+; X64-AVX-NEXT: vmovsd %xmm0, {{.*}}(%rip)
+; X64-AVX-NEXT: popq %rax
+; X64-AVX-NEXT: retq
entry:
%0 = load fp128, fp128* @vf128, align 16
%conv = fptrunc fp128 %0 to double
@@ -311,18 +399,18 @@ entry:
}
define void @TestFPTruncF128_F80() nounwind {
-; X64-LABEL: TestFPTruncF128_F80:
-; X64: # %bb.0: # %entry
-; X64-NEXT: subq $24, %rsp
-; X64-NEXT: movaps {{.*}}(%rip), %xmm0
-; X64-NEXT: callq __trunctfxf2
-; X64-NEXT: fstpt (%rsp)
-; X64-NEXT: movq (%rsp), %rax
-; X64-NEXT: movq %rax, {{.*}}(%rip)
-; X64-NEXT: movl {{[0-9]+}}(%rsp), %eax
-; X64-NEXT: movw %ax, vf80+{{.*}}(%rip)
-; X64-NEXT: addq $24, %rsp
-; X64-NEXT: retq
+; X64-SSE-LABEL: TestFPTruncF128_F80:
+; X64-SSE: # %bb.0: # %entry
+; X64-SSE-NEXT: subq $24, %rsp
+; X64-SSE-NEXT: movaps {{.*}}(%rip), %xmm0
+; X64-SSE-NEXT: callq __trunctfxf2
+; X64-SSE-NEXT: fstpt (%rsp)
+; X64-SSE-NEXT: movq (%rsp), %rax
+; X64-SSE-NEXT: movq %rax, {{.*}}(%rip)
+; X64-SSE-NEXT: movl {{[0-9]+}}(%rsp), %eax
+; X64-SSE-NEXT: movw %ax, vf80+{{.*}}(%rip)
+; X64-SSE-NEXT: addq $24, %rsp
+; X64-SSE-NEXT: retq
;
; X32-LABEL: TestFPTruncF128_F80:
; X32: # %bb.0: # %entry
@@ -336,6 +424,19 @@ define void @TestFPTruncF128_F80() nounw
; X32-NEXT: fstpt vf80
; X32-NEXT: addl $12, %esp
; X32-NEXT: retl
+;
+; X64-AVX-LABEL: TestFPTruncF128_F80:
+; X64-AVX: # %bb.0: # %entry
+; X64-AVX-NEXT: subq $24, %rsp
+; X64-AVX-NEXT: vmovaps {{.*}}(%rip), %xmm0
+; X64-AVX-NEXT: callq __trunctfxf2
+; X64-AVX-NEXT: fstpt (%rsp)
+; X64-AVX-NEXT: movq (%rsp), %rax
+; X64-AVX-NEXT: movq %rax, {{.*}}(%rip)
+; X64-AVX-NEXT: movl {{[0-9]+}}(%rsp), %eax
+; X64-AVX-NEXT: movw %ax, vf80+{{.*}}(%rip)
+; X64-AVX-NEXT: addq $24, %rsp
+; X64-AVX-NEXT: retq
entry:
%0 = load fp128, fp128* @vf128, align 16
%conv = fptrunc fp128 %0 to x86_fp80
@@ -344,14 +445,14 @@ entry:
}
define void @TestSIToFPI32_F128() nounwind {
-; X64-LABEL: TestSIToFPI32_F128:
-; X64: # %bb.0: # %entry
-; X64-NEXT: pushq %rax
-; X64-NEXT: movl {{.*}}(%rip), %edi
-; X64-NEXT: callq __floatsitf
-; X64-NEXT: movaps %xmm0, {{.*}}(%rip)
-; X64-NEXT: popq %rax
-; X64-NEXT: retq
+; X64-SSE-LABEL: TestSIToFPI32_F128:
+; X64-SSE: # %bb.0: # %entry
+; X64-SSE-NEXT: pushq %rax
+; X64-SSE-NEXT: movl {{.*}}(%rip), %edi
+; X64-SSE-NEXT: callq __floatsitf
+; X64-SSE-NEXT: movaps %xmm0, {{.*}}(%rip)
+; X64-SSE-NEXT: popq %rax
+; X64-SSE-NEXT: retq
;
; X32-LABEL: TestSIToFPI32_F128:
; X32: # %bb.0: # %entry
@@ -373,6 +474,15 @@ define void @TestSIToFPI32_F128() nounwi
; X32-NEXT: addl $24, %esp
; X32-NEXT: popl %esi
; X32-NEXT: retl
+;
+; X64-AVX-LABEL: TestSIToFPI32_F128:
+; X64-AVX: # %bb.0: # %entry
+; X64-AVX-NEXT: pushq %rax
+; X64-AVX-NEXT: movl {{.*}}(%rip), %edi
+; X64-AVX-NEXT: callq __floatsitf
+; X64-AVX-NEXT: vmovaps %xmm0, {{.*}}(%rip)
+; X64-AVX-NEXT: popq %rax
+; X64-AVX-NEXT: retq
entry:
%0 = load i32, i32* @vi32, align 4
%conv = sitofp i32 %0 to fp128
@@ -381,14 +491,14 @@ entry:
}
define void @TestUIToFPU32_F128() #2 {
-; X64-LABEL: TestUIToFPU32_F128:
-; X64: # %bb.0: # %entry
-; X64-NEXT: pushq %rax
-; X64-NEXT: movl {{.*}}(%rip), %edi
-; X64-NEXT: callq __floatunsitf
-; X64-NEXT: movaps %xmm0, {{.*}}(%rip)
-; X64-NEXT: popq %rax
-; X64-NEXT: retq
+; X64-SSE-LABEL: TestUIToFPU32_F128:
+; X64-SSE: # %bb.0: # %entry
+; X64-SSE-NEXT: pushq %rax
+; X64-SSE-NEXT: movl {{.*}}(%rip), %edi
+; X64-SSE-NEXT: callq __floatunsitf
+; X64-SSE-NEXT: movaps %xmm0, {{.*}}(%rip)
+; X64-SSE-NEXT: popq %rax
+; X64-SSE-NEXT: retq
;
; X32-LABEL: TestUIToFPU32_F128:
; X32: # %bb.0: # %entry
@@ -410,6 +520,15 @@ define void @TestUIToFPU32_F128() #2 {
; X32-NEXT: addl $24, %esp
; X32-NEXT: popl %esi
; X32-NEXT: retl
+;
+; X64-AVX-LABEL: TestUIToFPU32_F128:
+; X64-AVX: # %bb.0: # %entry
+; X64-AVX-NEXT: pushq %rax
+; X64-AVX-NEXT: movl {{.*}}(%rip), %edi
+; X64-AVX-NEXT: callq __floatunsitf
+; X64-AVX-NEXT: vmovaps %xmm0, {{.*}}(%rip)
+; X64-AVX-NEXT: popq %rax
+; X64-AVX-NEXT: retq
entry:
%0 = load i32, i32* @vu32, align 4
%conv = uitofp i32 %0 to fp128
@@ -418,14 +537,14 @@ entry:
}
define void @TestSIToFPI64_F128() nounwind {
-; X64-LABEL: TestSIToFPI64_F128:
-; X64: # %bb.0: # %entry
-; X64-NEXT: pushq %rax
-; X64-NEXT: movq {{.*}}(%rip), %rdi
-; X64-NEXT: callq __floatditf
-; X64-NEXT: movaps %xmm0, {{.*}}(%rip)
-; X64-NEXT: popq %rax
-; X64-NEXT: retq
+; X64-SSE-LABEL: TestSIToFPI64_F128:
+; X64-SSE: # %bb.0: # %entry
+; X64-SSE-NEXT: pushq %rax
+; X64-SSE-NEXT: movq {{.*}}(%rip), %rdi
+; X64-SSE-NEXT: callq __floatditf
+; X64-SSE-NEXT: movaps %xmm0, {{.*}}(%rip)
+; X64-SSE-NEXT: popq %rax
+; X64-SSE-NEXT: retq
;
; X32-LABEL: TestSIToFPI64_F128:
; X32: # %bb.0: # %entry
@@ -448,6 +567,15 @@ define void @TestSIToFPI64_F128() nounwi
; X32-NEXT: addl $24, %esp
; X32-NEXT: popl %esi
; X32-NEXT: retl
+;
+; X64-AVX-LABEL: TestSIToFPI64_F128:
+; X64-AVX: # %bb.0: # %entry
+; X64-AVX-NEXT: pushq %rax
+; X64-AVX-NEXT: movq {{.*}}(%rip), %rdi
+; X64-AVX-NEXT: callq __floatditf
+; X64-AVX-NEXT: vmovaps %xmm0, {{.*}}(%rip)
+; X64-AVX-NEXT: popq %rax
+; X64-AVX-NEXT: retq
entry:
%0 = load i64, i64* @vi64, align 8
%conv = sitofp i64 %0 to fp128
@@ -456,14 +584,14 @@ entry:
}
define void @TestUIToFPU64_F128() #2 {
-; X64-LABEL: TestUIToFPU64_F128:
-; X64: # %bb.0: # %entry
-; X64-NEXT: pushq %rax
-; X64-NEXT: movq {{.*}}(%rip), %rdi
-; X64-NEXT: callq __floatunditf
-; X64-NEXT: movaps %xmm0, {{.*}}(%rip)
-; X64-NEXT: popq %rax
-; X64-NEXT: retq
+; X64-SSE-LABEL: TestUIToFPU64_F128:
+; X64-SSE: # %bb.0: # %entry
+; X64-SSE-NEXT: pushq %rax
+; X64-SSE-NEXT: movq {{.*}}(%rip), %rdi
+; X64-SSE-NEXT: callq __floatunditf
+; X64-SSE-NEXT: movaps %xmm0, {{.*}}(%rip)
+; X64-SSE-NEXT: popq %rax
+; X64-SSE-NEXT: retq
;
; X32-LABEL: TestUIToFPU64_F128:
; X32: # %bb.0: # %entry
@@ -486,6 +614,15 @@ define void @TestUIToFPU64_F128() #2 {
; X32-NEXT: addl $24, %esp
; X32-NEXT: popl %esi
; X32-NEXT: retl
+;
+; X64-AVX-LABEL: TestUIToFPU64_F128:
+; X64-AVX: # %bb.0: # %entry
+; X64-AVX-NEXT: pushq %rax
+; X64-AVX-NEXT: movq {{.*}}(%rip), %rdi
+; X64-AVX-NEXT: callq __floatunditf
+; X64-AVX-NEXT: vmovaps %xmm0, {{.*}}(%rip)
+; X64-AVX-NEXT: popq %rax
+; X64-AVX-NEXT: retq
entry:
%0 = load i64, i64* @vu64, align 8
%conv = uitofp i64 %0 to fp128
@@ -494,17 +631,17 @@ entry:
}
define i32 @TestConst128(fp128 %v) nounwind {
-; X64-LABEL: TestConst128:
-; X64: # %bb.0: # %entry
-; X64-NEXT: pushq %rax
-; X64-NEXT: movaps {{.*}}(%rip), %xmm1
-; X64-NEXT: callq __gttf2
-; X64-NEXT: xorl %ecx, %ecx
-; X64-NEXT: testl %eax, %eax
-; X64-NEXT: setg %cl
-; X64-NEXT: movl %ecx, %eax
-; X64-NEXT: popq %rcx
-; X64-NEXT: retq
+; X64-SSE-LABEL: TestConst128:
+; X64-SSE: # %bb.0: # %entry
+; X64-SSE-NEXT: pushq %rax
+; X64-SSE-NEXT: movaps {{.*}}(%rip), %xmm1
+; X64-SSE-NEXT: callq __gttf2
+; X64-SSE-NEXT: xorl %ecx, %ecx
+; X64-SSE-NEXT: testl %eax, %eax
+; X64-SSE-NEXT: setg %cl
+; X64-SSE-NEXT: movl %ecx, %eax
+; X64-SSE-NEXT: popq %rcx
+; X64-SSE-NEXT: retq
;
; X32-LABEL: TestConst128:
; X32: # %bb.0: # %entry
@@ -525,6 +662,18 @@ define i32 @TestConst128(fp128 %v) nounw
; X32-NEXT: movl %ecx, %eax
; X32-NEXT: addl $12, %esp
; X32-NEXT: retl
+;
+; X64-AVX-LABEL: TestConst128:
+; X64-AVX: # %bb.0: # %entry
+; X64-AVX-NEXT: pushq %rax
+; X64-AVX-NEXT: vmovaps {{.*}}(%rip), %xmm1
+; X64-AVX-NEXT: callq __gttf2
+; X64-AVX-NEXT: xorl %ecx, %ecx
+; X64-AVX-NEXT: testl %eax, %eax
+; X64-AVX-NEXT: setg %cl
+; X64-AVX-NEXT: movl %ecx, %eax
+; X64-AVX-NEXT: popq %rcx
+; X64-AVX-NEXT: retq
entry:
%cmp = fcmp ogt fp128 %v, 0xL00000000000000003FFF000000000000
%conv = zext i1 %cmp to i32
@@ -546,20 +695,20 @@ entry:
; return ((u.bits.v1 | u.bits.v2) == 0);
; }
define i32 @TestBits128(fp128 %ld) nounwind {
-; X64-LABEL: TestBits128:
-; X64: # %bb.0: # %entry
-; X64-NEXT: subq $24, %rsp
-; X64-NEXT: movaps %xmm0, %xmm1
-; X64-NEXT: callq __multf3
-; X64-NEXT: movaps %xmm0, (%rsp)
-; X64-NEXT: movq (%rsp), %rcx
-; X64-NEXT: movq %rcx, %rdx
-; X64-NEXT: shrq $32, %rdx
-; X64-NEXT: xorl %eax, %eax
-; X64-NEXT: orl %ecx, %edx
-; X64-NEXT: sete %al
-; X64-NEXT: addq $24, %rsp
-; X64-NEXT: retq
+; X64-SSE-LABEL: TestBits128:
+; X64-SSE: # %bb.0: # %entry
+; X64-SSE-NEXT: subq $24, %rsp
+; X64-SSE-NEXT: movaps %xmm0, %xmm1
+; X64-SSE-NEXT: callq __multf3
+; X64-SSE-NEXT: movaps %xmm0, (%rsp)
+; X64-SSE-NEXT: movq (%rsp), %rcx
+; X64-SSE-NEXT: movq %rcx, %rdx
+; X64-SSE-NEXT: shrq $32, %rdx
+; X64-SSE-NEXT: xorl %eax, %eax
+; X64-SSE-NEXT: orl %ecx, %edx
+; X64-SSE-NEXT: sete %al
+; X64-SSE-NEXT: addq $24, %rsp
+; X64-SSE-NEXT: retq
;
; X32-LABEL: TestBits128:
; X32: # %bb.0: # %entry
@@ -591,6 +740,21 @@ define i32 @TestBits128(fp128 %ld) nounw
; X32-NEXT: popl %esi
; X32-NEXT: popl %edi
; X32-NEXT: retl
+;
+; X64-AVX-LABEL: TestBits128:
+; X64-AVX: # %bb.0: # %entry
+; X64-AVX-NEXT: subq $24, %rsp
+; X64-AVX-NEXT: vmovaps %xmm0, %xmm1
+; X64-AVX-NEXT: callq __multf3
+; X64-AVX-NEXT: vmovaps %xmm0, (%rsp)
+; X64-AVX-NEXT: movq (%rsp), %rcx
+; X64-AVX-NEXT: movq %rcx, %rdx
+; X64-AVX-NEXT: shrq $32, %rdx
+; X64-AVX-NEXT: xorl %eax, %eax
+; X64-AVX-NEXT: orl %ecx, %edx
+; X64-AVX-NEXT: sete %al
+; X64-AVX-NEXT: addq $24, %rsp
+; X64-AVX-NEXT: retq
entry:
%mul = fmul fp128 %ld, %ld
%0 = bitcast fp128 %mul to i128
@@ -617,14 +781,14 @@ entry:
; return *(__float128*)&n;
; }
define fp128 @TestPair128(i64 %a, i64 %b) nounwind {
-; X64-LABEL: TestPair128:
-; X64: # %bb.0: # %entry
-; X64-NEXT: addq $3, %rsi
-; X64-NEXT: movq %rsi, -{{[0-9]+}}(%rsp)
-; X64-NEXT: adcq $0, %rdi
-; X64-NEXT: movq %rdi, -{{[0-9]+}}(%rsp)
-; X64-NEXT: movaps -{{[0-9]+}}(%rsp), %xmm0
-; X64-NEXT: retq
+; X64-SSE-LABEL: TestPair128:
+; X64-SSE: # %bb.0: # %entry
+; X64-SSE-NEXT: addq $3, %rsi
+; X64-SSE-NEXT: movq %rsi, -{{[0-9]+}}(%rsp)
+; X64-SSE-NEXT: adcq $0, %rdi
+; X64-SSE-NEXT: movq %rdi, -{{[0-9]+}}(%rsp)
+; X64-SSE-NEXT: movaps -{{[0-9]+}}(%rsp), %xmm0
+; X64-SSE-NEXT: retq
;
; X32-LABEL: TestPair128:
; X32: # %bb.0: # %entry
@@ -646,6 +810,15 @@ define fp128 @TestPair128(i64 %a, i64 %b
; X32-NEXT: popl %esi
; X32-NEXT: popl %edi
; X32-NEXT: retl $4
+;
+; X64-AVX-LABEL: TestPair128:
+; X64-AVX: # %bb.0: # %entry
+; X64-AVX-NEXT: addq $3, %rsi
+; X64-AVX-NEXT: movq %rsi, -{{[0-9]+}}(%rsp)
+; X64-AVX-NEXT: adcq $0, %rdi
+; X64-AVX-NEXT: movq %rdi, -{{[0-9]+}}(%rsp)
+; X64-AVX-NEXT: vmovaps -{{[0-9]+}}(%rsp), %xmm0
+; X64-AVX-NEXT: retq
entry:
%conv = zext i64 %a to i128
%shl = shl nuw i128 %conv, 64
@@ -657,20 +830,20 @@ entry:
}
define fp128 @TestTruncCopysign(fp128 %x, i32 %n) nounwind {
-; X64-LABEL: TestTruncCopysign:
-; X64: # %bb.0: # %entry
-; X64-NEXT: cmpl $50001, %edi # imm = 0xC351
-; X64-NEXT: jl .LBB17_2
-; X64-NEXT: # %bb.1: # %if.then
-; X64-NEXT: pushq %rax
-; X64-NEXT: callq __trunctfdf2
-; X64-NEXT: andps {{.*}}(%rip), %xmm0
-; X64-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
-; X64-NEXT: orps %xmm1, %xmm0
-; X64-NEXT: callq __extenddftf2
-; X64-NEXT: addq $8, %rsp
-; X64-NEXT: .LBB17_2: # %cleanup
-; X64-NEXT: retq
+; X64-SSE-LABEL: TestTruncCopysign:
+; X64-SSE: # %bb.0: # %entry
+; X64-SSE-NEXT: cmpl $50001, %edi # imm = 0xC351
+; X64-SSE-NEXT: jl .LBB17_2
+; X64-SSE-NEXT: # %bb.1: # %if.then
+; X64-SSE-NEXT: pushq %rax
+; X64-SSE-NEXT: callq __trunctfdf2
+; X64-SSE-NEXT: andps {{.*}}(%rip), %xmm0
+; X64-SSE-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
+; X64-SSE-NEXT: orps %xmm1, %xmm0
+; X64-SSE-NEXT: callq __extenddftf2
+; X64-SSE-NEXT: addq $8, %rsp
+; X64-SSE-NEXT: .LBB17_2: # %cleanup
+; X64-SSE-NEXT: retq
;
; X32-LABEL: TestTruncCopysign:
; X32: # %bb.0: # %entry
@@ -721,6 +894,22 @@ define fp128 @TestTruncCopysign(fp128 %x
; X32-NEXT: popl %esi
; X32-NEXT: popl %edi
; X32-NEXT: retl $4
+;
+; X64-AVX-LABEL: TestTruncCopysign:
+; X64-AVX: # %bb.0: # %entry
+; X64-AVX-NEXT: cmpl $50001, %edi # imm = 0xC351
+; X64-AVX-NEXT: jl .LBB17_2
+; X64-AVX-NEXT: # %bb.1: # %if.then
+; X64-AVX-NEXT: pushq %rax
+; X64-AVX-NEXT: callq __trunctfdf2
+; X64-AVX-NEXT: vandps {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vmovddup {{.*#+}} xmm1 = [+Inf,+Inf]
+; X64-AVX-NEXT: # xmm1 = mem[0,0]
+; X64-AVX-NEXT: vorps %xmm0, %xmm1, %xmm0
+; X64-AVX-NEXT: callq __extenddftf2
+; X64-AVX-NEXT: addq $8, %rsp
+; X64-AVX-NEXT: .LBB17_2: # %cleanup
+; X64-AVX-NEXT: retq
entry:
%cmp = icmp sgt i32 %n, 50000
br i1 %cmp, label %if.then, label %cleanup
@@ -737,15 +926,15 @@ cleanup:
}
define i1 @PR34866(i128 %x) nounwind {
-; X64-LABEL: PR34866:
-; X64: # %bb.0:
-; X64-NEXT: movaps {{.*}}(%rip), %xmm0
-; X64-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
-; X64-NEXT: xorq -{{[0-9]+}}(%rsp), %rsi
-; X64-NEXT: xorq -{{[0-9]+}}(%rsp), %rdi
-; X64-NEXT: orq %rsi, %rdi
-; X64-NEXT: sete %al
-; X64-NEXT: retq
+; X64-SSE-LABEL: PR34866:
+; X64-SSE: # %bb.0:
+; X64-SSE-NEXT: movaps {{.*}}(%rip), %xmm0
+; X64-SSE-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
+; X64-SSE-NEXT: xorq -{{[0-9]+}}(%rsp), %rsi
+; X64-SSE-NEXT: xorq -{{[0-9]+}}(%rsp), %rdi
+; X64-SSE-NEXT: orq %rsi, %rdi
+; X64-SSE-NEXT: sete %al
+; X64-SSE-NEXT: retq
;
; X32-LABEL: PR34866:
; X32: # %bb.0:
@@ -756,21 +945,31 @@ define i1 @PR34866(i128 %x) nounwind {
; X32-NEXT: orl %ecx, %eax
; X32-NEXT: sete %al
; X32-NEXT: retl
+;
+; X64-AVX-LABEL: PR34866:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vmovaps {{.*}}(%rip), %xmm0
+; X64-AVX-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)
+; X64-AVX-NEXT: xorq -{{[0-9]+}}(%rsp), %rsi
+; X64-AVX-NEXT: xorq -{{[0-9]+}}(%rsp), %rdi
+; X64-AVX-NEXT: orq %rsi, %rdi
+; X64-AVX-NEXT: sete %al
+; X64-AVX-NEXT: retq
%bc_mmx = bitcast fp128 0xL00000000000000000000000000000000 to i128
%cmp = icmp eq i128 %bc_mmx, %x
ret i1 %cmp
}
define i1 @PR34866_commute(i128 %x) nounwind {
-; X64-LABEL: PR34866_commute:
-; X64: # %bb.0:
-; X64-NEXT: movaps {{.*}}(%rip), %xmm0
-; X64-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
-; X64-NEXT: xorq -{{[0-9]+}}(%rsp), %rsi
-; X64-NEXT: xorq -{{[0-9]+}}(%rsp), %rdi
-; X64-NEXT: orq %rsi, %rdi
-; X64-NEXT: sete %al
-; X64-NEXT: retq
+; X64-SSE-LABEL: PR34866_commute:
+; X64-SSE: # %bb.0:
+; X64-SSE-NEXT: movaps {{.*}}(%rip), %xmm0
+; X64-SSE-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
+; X64-SSE-NEXT: xorq -{{[0-9]+}}(%rsp), %rsi
+; X64-SSE-NEXT: xorq -{{[0-9]+}}(%rsp), %rdi
+; X64-SSE-NEXT: orq %rsi, %rdi
+; X64-SSE-NEXT: sete %al
+; X64-SSE-NEXT: retq
;
; X32-LABEL: PR34866_commute:
; X32: # %bb.0:
@@ -781,6 +980,16 @@ define i1 @PR34866_commute(i128 %x) noun
; X32-NEXT: orl %ecx, %eax
; X32-NEXT: sete %al
; X32-NEXT: retl
+;
+; X64-AVX-LABEL: PR34866_commute:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vmovaps {{.*}}(%rip), %xmm0
+; X64-AVX-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)
+; X64-AVX-NEXT: xorq -{{[0-9]+}}(%rsp), %rsi
+; X64-AVX-NEXT: xorq -{{[0-9]+}}(%rsp), %rdi
+; X64-AVX-NEXT: orq %rsi, %rdi
+; X64-AVX-NEXT: sete %al
+; X64-AVX-NEXT: retq
%bc_mmx = bitcast fp128 0xL00000000000000000000000000000000 to i128
%cmp = icmp eq i128 %x, %bc_mmx
ret i1 %cmp
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