[llvm] r371348 - [InstCombine] add tests for icmp with srem operand; NFC
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Sun Sep 8 12:48:47 PDT 2019
Author: spatel
Date: Sun Sep 8 12:48:47 2019
New Revision: 371348
URL: http://llvm.org/viewvc/llvm-project?rev=371348&view=rev
Log:
[InstCombine] add tests for icmp with srem operand; NFC
Modified:
llvm/trunk/test/Transforms/InstCombine/icmp-div-constant.ll
Modified: llvm/trunk/test/Transforms/InstCombine/icmp-div-constant.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/icmp-div-constant.ll?rev=371348&r1=371347&r2=371348&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/icmp-div-constant.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/icmp-div-constant.ll Sun Sep 8 12:48:47 2019
@@ -1,6 +1,98 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -instcombine -S | FileCheck %s
+define i1 @is_rem2_neg_i8(i8 %x) {
+; CHECK-LABEL: @is_rem2_neg_i8(
+; CHECK-NEXT: [[S:%.*]] = srem i8 [[X:%.*]], 2
+; CHECK-NEXT: [[R:%.*]] = icmp slt i8 [[S]], 0
+; CHECK-NEXT: ret i1 [[R]]
+;
+ %s = srem i8 %x, 2
+ %r = icmp slt i8 %s, 0
+ ret i1 %r
+}
+
+define <2 x i1> @is_rem2_pos_v2i8(<2 x i8> %x) {
+; CHECK-LABEL: @is_rem2_pos_v2i8(
+; CHECK-NEXT: [[S:%.*]] = srem <2 x i8> [[X:%.*]], <i8 2, i8 2>
+; CHECK-NEXT: [[R:%.*]] = icmp sgt <2 x i8> [[S]], zeroinitializer
+; CHECK-NEXT: ret <2 x i1> [[R]]
+;
+ %s = srem <2 x i8> %x, <i8 2, i8 2>
+ %r = icmp sgt <2 x i8> %s, zeroinitializer
+ ret <2 x i1> %r
+}
+
+define i1 @is_rem32_pos_i8(i8 %x) {
+; CHECK-LABEL: @is_rem32_pos_i8(
+; CHECK-NEXT: [[S:%.*]] = srem i8 [[X:%.*]], 32
+; CHECK-NEXT: [[R:%.*]] = icmp sgt i8 [[S]], 0
+; CHECK-NEXT: ret i1 [[R]]
+;
+ %s = srem i8 %x, 32
+ %r = icmp sgt i8 %s, 0
+ ret i1 %r
+}
+
+define i1 @is_rem4_neg_i16(i16 %x) {
+; CHECK-LABEL: @is_rem4_neg_i16(
+; CHECK-NEXT: [[S:%.*]] = srem i16 [[X:%.*]], 4
+; CHECK-NEXT: [[R:%.*]] = icmp slt i16 [[S]], 0
+; CHECK-NEXT: ret i1 [[R]]
+;
+ %s = srem i16 %x, 4
+ %r = icmp slt i16 %s, 0
+ ret i1 %r
+}
+
+declare void @use(i32)
+
+define i1 @is_rem32_neg_i32_extra_use(i32 %x) {
+; CHECK-LABEL: @is_rem32_neg_i32_extra_use(
+; CHECK-NEXT: [[S:%.*]] = srem i32 [[X:%.*]], 32
+; CHECK-NEXT: call void @use(i32 [[S]])
+; CHECK-NEXT: [[R:%.*]] = icmp slt i32 [[S]], 0
+; CHECK-NEXT: ret i1 [[R]]
+;
+ %s = srem i32 %x, 32
+ call void @use(i32 %s)
+ %r = icmp slt i32 %s, 0
+ ret i1 %r
+}
+
+define i1 @is_rem8_nonneg_i16(i16 %x) {
+; CHECK-LABEL: @is_rem8_nonneg_i16(
+; CHECK-NEXT: [[S:%.*]] = srem i16 [[X:%.*]], 8
+; CHECK-NEXT: [[R:%.*]] = icmp sgt i16 [[S]], -1
+; CHECK-NEXT: ret i1 [[R]]
+;
+ %s = srem i16 %x, 8
+ %r = icmp sgt i16 %s, -1
+ ret i1 %r
+}
+
+define i1 @is_rem3_neg_i8(i8 %x) {
+; CHECK-LABEL: @is_rem3_neg_i8(
+; CHECK-NEXT: [[S:%.*]] = srem i8 [[X:%.*]], 3
+; CHECK-NEXT: [[R:%.*]] = icmp slt i8 [[S]], 0
+; CHECK-NEXT: ret i1 [[R]]
+;
+ %s = srem i8 %x, 3
+ %r = icmp slt i8 %s, 0
+ ret i1 %r
+}
+
+define i1 @is_rem16_something_i8(i8 %x) {
+; CHECK-LABEL: @is_rem16_something_i8(
+; CHECK-NEXT: [[S:%.*]] = srem i8 [[X:%.*]], 16
+; CHECK-NEXT: [[R:%.*]] = icmp slt i8 [[S]], 7
+; CHECK-NEXT: ret i1 [[R]]
+;
+ %s = srem i8 %x, 16
+ %r = icmp slt i8 %s, 7
+ ret i1 %r
+}
+
; PR30281 - https://llvm.org/bugs/show_bug.cgi?id=30281
; All of these tests contain foldable division-by-constant instructions, but we
@@ -9,14 +101,14 @@
define i32 @icmp_div(i16 %a, i16 %c) {
; CHECK-LABEL: @icmp_div(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i16 %a, 0
-; CHECK-NEXT: br i1 [[TOBOOL]], label %then, label %exit
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i16 [[A:%.*]], 0
+; CHECK-NEXT: br i1 [[TOBOOL]], label [[THEN:%.*]], label [[EXIT:%.*]]
; CHECK: then:
-; CHECK-NEXT: [[NOT_CMP:%.*]] = icmp eq i16 %c, 0
-; CHECK-NEXT: [[PHITMP1:%.*]] = sext i1 [[NOT_CMP]] to i32
-; CHECK-NEXT: br label %exit
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i16 [[C:%.*]], 0
+; CHECK-NEXT: [[PHITMP1:%.*]] = sext i1 [[CMP]] to i32
+; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
-; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ -1, %entry ], [ [[PHITMP1]], %then ]
+; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ -1, [[ENTRY:%.*]] ], [ [[PHITMP1]], [[THEN]] ]
; CHECK-NEXT: ret i32 [[PHI]]
;
entry:
@@ -38,12 +130,12 @@ exit:
define i32 @icmp_div2(i16 %a, i16 %c) {
; CHECK-LABEL: @icmp_div2(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i16 %a, 0
-; CHECK-NEXT: br i1 [[TOBOOL]], label %then, label %exit
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i16 [[A:%.*]], 0
+; CHECK-NEXT: br i1 [[TOBOOL]], label [[THEN:%.*]], label [[EXIT:%.*]]
; CHECK: then:
-; CHECK-NEXT: br label %exit
+; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
-; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ -1, %entry ], [ 0, %then ]
+; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ -1, [[ENTRY:%.*]] ], [ 0, [[THEN]] ]
; CHECK-NEXT: ret i32 [[PHI]]
;
entry:
@@ -65,14 +157,14 @@ exit:
define i32 @icmp_div3(i16 %a, i16 %c) {
; CHECK-LABEL: @icmp_div3(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i16 %a, 0
-; CHECK-NEXT: br i1 [[TOBOOL]], label %then, label %exit
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i16 [[A:%.*]], 0
+; CHECK-NEXT: br i1 [[TOBOOL]], label [[THEN:%.*]], label [[EXIT:%.*]]
; CHECK: then:
-; CHECK-NEXT: [[NOT_CMP:%.*]] = icmp eq i16 %c, 0
-; CHECK-NEXT: [[PHITMP1:%.*]] = sext i1 [[NOT_CMP]] to i32
-; CHECK-NEXT: br label %exit
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i16 [[C:%.*]], 0
+; CHECK-NEXT: [[PHITMP1:%.*]] = sext i1 [[CMP]] to i32
+; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
-; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ -1, %entry ], [ [[PHITMP1]], %then ]
+; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ -1, [[ENTRY:%.*]] ], [ [[PHITMP1]], [[THEN]] ]
; CHECK-NEXT: ret i32 [[PHI]]
;
entry:
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