[PATCH] D67070: [X86][SSE] Add support for <64 x i1> bool reduction
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Sep 8 04:48:49 PDT 2019
This revision was automatically updated to reflect the committed changes.
Closed by commit rL371328: [X86][SSE] Add support for <64 x i1> bool reduction (authored by RKSimon, committed by ).
Changed prior to commit:
https://reviews.llvm.org/D67070?vs=218329&id=219258#toc
Repository:
rL LLVM
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D67070/new/
https://reviews.llvm.org/D67070
Files:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
llvm/trunk/test/CodeGen/X86/vector-reduce-and-bool.ll
llvm/trunk/test/CodeGen/X86/vector-reduce-or-bool.ll
llvm/trunk/test/CodeGen/X86/vector-reduce-xor-bool.ll
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