[PATCH] D67320: [mips] Fix decoding of microMIPS JALX instruction

[Simon Atanasyan via Phabricator via llvm-commits]

atanasyan created this revision.
atanasyan added a reviewer: Petar.Avramovic.
Herald added subscribers: MaskRay, jrtc27, hiraditya, arichardson, sdardis, emaste.
Herald added a reviewer: espindola.
Herald added a project: LLVM.

microMIPS jump and link exchange instruction stores a target in a 26-bits field. Despite other microMIPS JAL instructions these bits are target address shifted right 2 bits [1]. The patch fixes the JALX instruction decoding and uses 2-bit shift.

[1] MIPS Architecture for Programmers Volume II-B: The microMIPS32 Instruction Set


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D67320

Files:
  lld/test/ELF/mips-micro-cross-calls.s
  llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
  llvm/lib/Target/Mips/MicroMipsInstrInfo.td
  llvm/test/MC/Disassembler/Mips/micromips32r3/valid-el.txt
  llvm/test/MC/Disassembler/Mips/micromips32r3/valid.txt

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