[llvm] r371302 - Fix MSVC "32-bit shift implicitly converted to 64 bits" warnings. NFCI.

[Simon Pilgrim via llvm-commits]

Author: rksimon
Date: Sat Sep  7 04:04:04 2019
New Revision: 371302

URL: http://llvm.org/viewvc/llvm-project?rev=371302&view=rev
Log:
Fix MSVC "32-bit shift implicitly converted to 64 bits" warnings. NFCI.

Modified:
    llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=371302&r1=371301&r2=371302&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Sat Sep  7 04:04:04 2019
@@ -1420,7 +1420,7 @@ ARMTargetLowering::ARMTargetLowering(con
   PredictableSelectIsExpensive = Subtarget->getSchedModel().isOutOfOrder();
 
   setPrefLoopAlignment(
-      llvm::Align(1UL << Subtarget->getPrefLoopLogAlignment()));
+      llvm::Align(1ULL << Subtarget->getPrefLoopLogAlignment()));
 
   setMinFunctionAlignment(Subtarget->isThumb() ? llvm::Align(2)
                                                : llvm::Align(4));

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=371302&r1=371301&r2=371302&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Sat Sep  7 04:04:04 2019
@@ -1893,7 +1893,7 @@ X86TargetLowering::X86TargetLowering(con
   MaxLoadsPerMemcmpOptSize = 2;
 
   // Set loop alignment to 2^ExperimentalPrefLoopAlignment bytes (default: 2^4).
-  setPrefLoopAlignment(llvm::Align(1UL << ExperimentalPrefLoopAlignment));
+  setPrefLoopAlignment(llvm::Align(1ULL << ExperimentalPrefLoopAlignment));
 
   // An out-of-order CPU can speculatively execute past a predictable branch,
   // but a conditional move could be stalled by an expensive earlier operation.