[PATCH] D67309: AMDGPU: Move MnemonicAlias out of instruction def hierarchy

[Matt Arsenault via Phabricator via llvm-commits]

arsenm created this revision.
arsenm added reviewers: rampitec, alex-t, dp, vpykhtin.
Herald added subscribers: t-tye, tpr, dstuttard, yaxunl, nhaehnle, wdng, jvesely, kzhuravl.

Unfortunately MnemonicAlias defines a "Predicates" field just like an
instruction or pattern, with a somewhat different interpretation.

      

This ends up overriding the intended Predicates set by
PredicateControl on the pseudoinstruction defintions with an empty
list. This allowed incorrectly selecting instructions that should have
been rejected due to the SubtargetPredicate from patterns on the
instruction definition.

      

This does remove the divergent predicate from the 64-bit shift
patterns, which were already not used for the 32-bit shift, so I'm not
sure what the point was. This also removes a second, redundant copy of
the 64-bit divergent patterns.


https://reviews.llvm.org/D67309

Files:
  lib/Target/AMDGPU/VOP1Instructions.td
  lib/Target/AMDGPU/VOP2Instructions.td
  lib/Target/AMDGPU/VOP3Instructions.td
  lib/Target/AMDGPU/VOPInstructions.td
  test/CodeGen/AMDGPU/GlobalISel/inst-select-ashr.mir
  test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.mir
  test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.mir

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