[PATCH] D67306: [IfConversion] Correctly handle cases where analyzeBranch fails.

[Eli Friedman via Phabricator via llvm-commits]

efriedma created this revision.
efriedma added reviewers: dmgreen, kparzysz.
Herald added a project: LLVM.

If analyzeBranch fails, on some targets, the out parameters point to some blocks in the function. But we can't use that information, so make sure to clear it out.  (In some places in IfConversion, we assume that any block with a TrueBB is analyzable.)

The change to the testcase makes it trigger a bug on builds without this fix: IfConvertDiamond tries to perform a followup "merge" operation, which isn't legal, and we somehow end up with a branch to a deleted MBB. I'm not sure how this doesn't crash the compiler.

Fixes https://bugs.llvm.org/show_bug.cgi?id=42012


Repository:
  rL LLVM

https://reviews.llvm.org/D67306

Files:
  lib/CodeGen/IfConversion.cpp
  test/CodeGen/ARM/ifcvt-diamond-unanalyzable-common.mir


Index: test/CodeGen/ARM/ifcvt-diamond-unanalyzable-common.mir
===================================================================
--- test/CodeGen/ARM/ifcvt-diamond-unanalyzable-common.mir
+++ test/CodeGen/ARM/ifcvt-diamond-unanalyzable-common.mir
@@ -1,4 +1,4 @@
-# RUN: llc %s -o - -run-pass=if-converter | FileCheck %s
+# RUN: llc %s -o - -run-pass=if-converter -verify-machineinstrs | FileCheck %s
 # Make sure we correctly if-convert blocks containing an INLINEASM_BR.
 # CHECK: t2CMPri killed renamable $r2, 34
 # CHECK-NEXT: $r0 = t2MOVi 2, 1, $cpsr, $noreg
@@ -48,9 +48,8 @@
     t2B %bb.3, 14, $noreg
   
   bb.3:
-    successors: %bb.4(0x80000000)
-  
     INLINEASM &"", 1
+    $sp = t2LDMIA_RET $sp, 14, $noreg, def $r4, def $pc
   
   bb.4.l_yes (address-taken):
     $sp = t2LDMIA_RET $sp, 14, $noreg, def $r4, def $pc
Index: lib/CodeGen/IfConversion.cpp
===================================================================
--- lib/CodeGen/IfConversion.cpp
+++ lib/CodeGen/IfConversion.cpp
@@ -912,6 +912,12 @@
   BBI.BrCond.clear();
   BBI.IsBrAnalyzable =
       !TII->analyzeBranch(*BBI.BB, BBI.TrueBB, BBI.FalseBB, BBI.BrCond);
+  if (!BBI.IsBrAnalyzable) {
+    BBI.TrueBB = nullptr;
+    BBI.FalseBB = nullptr;
+    BBI.BrCond.clear();
+  }
+
   SmallVector<MachineOperand, 4> RevCond(BBI.BrCond.begin(), BBI.BrCond.end());
   BBI.IsBrReversible = (RevCond.size() == 0) ||
       !TII->reverseBranchCondition(RevCond);


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