[PATCH] D67303: [AArch64][GlobalISel] Enable the localizer for optimized builds

[Amara Emerson via Phabricator via llvm-commits]

aemerson created this revision.
aemerson added a reviewer: paquette.
Herald added subscribers: Petar.Avramovic, hiraditya, kristof.beyls, rovka.
Herald added a project: LLVM.

Despite the fact that the localizer's original motivation was to fix horrendous constant spilling at -O0, shortening live ranges still has net benefits even with optimizations enabled.

On an -Os build of CTMark, doing this improves code size by 0.5% geomean.

There are a few regressions, bullet increasing in size by 0.5%. One example from bullet where code size increased slightly was due to GlobalISel actually now generating the same code as SelectionDAG. So we actually have an opportunity in future to implement better heuristics for localization and therefore be *better* than SDAG in some cases. In relation to other optimizations though that one is relatively minor.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D67303

Files:
  llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll
  llvm/test/CodeGen/AArch64/GlobalISel/localizer-in-O0-pipeline.mir
  llvm/test/CodeGen/AArch64/GlobalISel/swifterror.ll


Index: llvm/test/CodeGen/AArch64/GlobalISel/swifterror.ll
===================================================================
--- llvm/test/CodeGen/AArch64/GlobalISel/swifterror.ll
+++ llvm/test/CodeGen/AArch64/GlobalISel/swifterror.ll
@@ -98,9 +98,9 @@
 define float @foo_if(%swift_error** swifterror %error_ptr_ref, i32 %cc) {
 ; CHECK-LABEL: foo_if:
 ; CHECK: cbz w0
-; CHECK: mov [[ID:w[0-9]+]], #1
 ; CHECK: mov w0, #16
 ; CHECK: malloc
+; CHECK: mov [[ID:w[0-9]+]], #1
 ; CHECK: strb [[ID]], [x0, #8]
 ; CHECK: mov x21, x0
 ; CHECK-NOT: x21
Index: llvm/test/CodeGen/AArch64/GlobalISel/localizer-in-O0-pipeline.mir
===================================================================
--- llvm/test/CodeGen/AArch64/GlobalISel/localizer-in-O0-pipeline.mir
+++ llvm/test/CodeGen/AArch64/GlobalISel/localizer-in-O0-pipeline.mir
@@ -60,18 +60,18 @@
 
 # Second block will get the constant 1.0 when the localizer is enabled.
 # CHECK: bb.1.{{[a-zA-Z0-9]+}}:
-# OPT-NOT: G_FCONSTANT
+# OPT: [[FONE:%[0-9]+]]:fpr(s32) = G_FCONSTANT float 1.000000e+00
 # OPTNONE: [[FONE:%[0-9]+]]:fpr(s32) = G_FCONSTANT float 1.000000e+00
 # CHECK: G_BR %bb.3
 
 # Thrid block will get the constant 2.0 when the localizer is enabled.
 # CHECK: bb.2.{{[a-zA-Z0-9]+}}:
-# OPT-NOT: G_FCONSTANT
+# OPT: [[FTWO:%[0-9]+]]:fpr(s32) = G_FCONSTANT float 2.000000e+00
 # OPTNONE: [[FTWO:%[0-9]+]]:fpr(s32) = G_FCONSTANT float 2.000000e+00
 
 # CHECK: bb.3.end
 # OPTNONE: %2:fpr(s32) = PHI [[FONE]](s32), %bb.1, [[FTWO]](s32), %bb.2
-# OPT: %2:fpr(s32) = PHI %4(s32), %bb.1, %5(s32), %bb.2
+# OPT: %2:fpr(s32) = PHI [[FONE]](s32), %bb.1, [[FTWO]](s32), %bb.2
 # CHECK-NEXT: G_FADD %0, %2
 body:             |
   bb.0 (%ir-block.0):
Index: llvm/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll
===================================================================
--- llvm/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll
+++ llvm/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll
@@ -51,7 +51,7 @@
 ; VERIFY-NEXT:   Verify generated machine code
 ; ENABLED-NEXT:  RegBankSelect
 ; VERIFY-NEXT:   Verify generated machine code
-; ENABLED-O0-NEXT:  Localizer
+; ENABLED-NEXT:  Localizer
 ; VERIFY-O0-NEXT:   Verify generated machine code
 ; ENABLED-NEXT: Analysis for ComputingKnownBits
 ; ENABLED-NEXT:  InstructionSelect
Index: llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
===================================================================
--- llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
+++ llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
@@ -518,9 +518,7 @@
 }
 
 void AArch64PassConfig::addPreGlobalInstructionSelect() {
-  // Workaround the deficiency of the fast register allocator.
-  if (TM->getOptLevel() == CodeGenOpt::None)
-    addPass(new Localizer());
+  addPass(new Localizer());
 }
 
 bool AArch64PassConfig::addGlobalInstructionSelect() {


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