[PATCH] D67297: [aarch64] Add combine patterns for fp16 fmla

[Sebastian Pop via Phabricator via llvm-commits]

sebpop created this revision.
sebpop added reviewers: SjoerdMeijer, az, evandro, jgreenhalgh, kristof.beyls.
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Herald added a project: LLVM.

This patch enables generation of fused multiply add/sub for instructions operating on fp16.
Tested on aarch64-linux.

There are 7 CHECK-FIXME for patterns for which I was not able to create a testcase to exercise the added code paths.
Those 7 patterns are mixing v[4|8]i16 with v[4|8]fp16 types with the help of a bitcast.
I am not sure how to write a testcase without the bitcast, and to generate coverage over those combine patterns,
so I would appreciate help on rewriting those testcases.


https://reviews.llvm.org/D67297

Files:
  llvm/include/llvm/CodeGen/MachineCombinerPattern.h
  llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
  llvm/test/CodeGen/AArch64/fp16-fmla.ll

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