[PATCH] D57059: [SLP] Initial support for the vectorization of the non-power-of-2 vectors.

[Sanjay Patel via Phabricator via llvm-commits]

spatel added inline comments.
Herald added a subscriber: ychen.


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Comment at: test/Transforms/SLPVectorizer/X86/sext.ll:602-619
 ; AVX1-LABEL: @loadext_4i16_to_4i64(
 ; AVX1-NEXT:    [[P1:%.*]] = getelementptr inbounds i16, i16* [[P0:%.*]], i64 1
 ; AVX1-NEXT:    [[P2:%.*]] = getelementptr inbounds i16, i16* [[P0]], i64 2
 ; AVX1-NEXT:    [[P3:%.*]] = getelementptr inbounds i16, i16* [[P0]], i64 3
 ; AVX1-NEXT:    [[TMP1:%.*]] = bitcast i16* [[P0]] to <2 x i16>*
 ; AVX1-NEXT:    [[TMP2:%.*]] = load <2 x i16>, <2 x i16>* [[TMP1]], align 1
+; AVX1-NEXT:    [[TMP3:%.*]] = bitcast i16* [[P2]] to <2 x i16>*
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For reference, this is the test noted in PR42997:
https://bugs.llvm.org/show_bug.cgi?id=42997
...and this patch will produce the expected AVX codegen:
  vpmovsxwq	(%rdi), %xmm0
  vpmovsxwq	4(%rdi), %xmm1
  vinsertf128	$1, %xmm1, %ymm0, %ymm0



Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D57059/new/

https://reviews.llvm.org/D57059