[llvm] r371200 - [Alignment][NFC] Use Align with TargetLowering::setMinFunctionAlignment
Guillaume Chatelet via llvm-commits
llvm-commits at lists.llvm.org
Fri Sep 6 05:48:34 PDT 2019
Author: gchatelet
Date: Fri Sep 6 05:48:34 2019
New Revision: 371200
URL: http://llvm.org/viewvc/llvm-project?rev=371200&view=rev
Log:
[Alignment][NFC] Use Align with TargetLowering::setMinFunctionAlignment
Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790
Reviewers: courbet
Subscribers: jyknight, sdardis, nemanjai, javed.absar, hiraditya, kbarton, fedor.sergeev, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, jsji, s.egerton, pzheng, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67229
Modified:
llvm/trunk/include/llvm/CodeGen/TargetLowering.h
llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
llvm/trunk/lib/Target/BPF/BPFISelLowering.cpp
llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.cpp
llvm/trunk/lib/Target/Lanai/LanaiISelLowering.cpp
llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp
llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
llvm/trunk/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp
llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp
llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp
Modified: llvm/trunk/include/llvm/CodeGen/TargetLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/TargetLowering.h?rev=371200&r1=371199&r2=371200&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/TargetLowering.h (original)
+++ llvm/trunk/include/llvm/CodeGen/TargetLowering.h Fri Sep 6 05:48:34 2019
@@ -2104,9 +2104,9 @@ protected:
TargetDAGCombineArray[NT >> 3] |= 1 << (NT&7);
}
- /// Set the target's minimum function alignment (in log2(bytes))
- void setMinFunctionLogAlignment(unsigned LogAlign) {
- MinFunctionAlignment = llvm::Align(1ULL << LogAlign);
+ /// Set the target's minimum function alignment.
+ void setMinFunctionAlignment(llvm::Align Align) {
+ MinFunctionAlignment = Align;
}
/// Set the target's preferred function alignment. This should be set if
Modified: llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp?rev=371200&r1=371199&r2=371200&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp Fri Sep 6 05:48:34 2019
@@ -640,7 +640,7 @@ AArch64TargetLowering::AArch64TargetLowe
EnableExtLdPromotion = true;
// Set required alignment.
- setMinFunctionLogAlignment(2);
+ setMinFunctionAlignment(llvm::Align(4));
// Set preferred alignments.
setPrefFunctionLogAlignment(STI.getPrefFunctionLogAlignment());
setPrefLoopLogAlignment(STI.getPrefLoopLogAlignment());
Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=371200&r1=371199&r2=371200&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Fri Sep 6 05:48:34 2019
@@ -1421,7 +1421,8 @@ ARMTargetLowering::ARMTargetLowering(con
setPrefLoopLogAlignment(Subtarget->getPrefLoopLogAlignment());
- setMinFunctionLogAlignment(Subtarget->isThumb() ? 1 : 2);
+ setMinFunctionAlignment(Subtarget->isThumb() ? llvm::Align(2)
+ : llvm::Align(4));
if (Subtarget->isThumb() || Subtarget->isThumb2())
setTargetDAGCombine(ISD::ABS);
Modified: llvm/trunk/lib/Target/BPF/BPFISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/BPF/BPFISelLowering.cpp?rev=371200&r1=371199&r2=371200&view=diff
==============================================================================
--- llvm/trunk/lib/Target/BPF/BPFISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/BPF/BPFISelLowering.cpp Fri Sep 6 05:48:34 2019
@@ -133,7 +133,7 @@ BPFTargetLowering::BPFTargetLowering(con
setBooleanContents(ZeroOrOneBooleanContent);
// Function alignments (log2)
- setMinFunctionLogAlignment(3);
+ setMinFunctionAlignment(llvm::Align(8));
setPrefFunctionLogAlignment(3);
if (BPFExpandMemcpyInOrder) {
Modified: llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.cpp?rev=371200&r1=371199&r2=371200&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.cpp Fri Sep 6 05:48:34 2019
@@ -1237,7 +1237,7 @@ HexagonTargetLowering::HexagonTargetLowe
setPrefLoopLogAlignment(4);
setPrefFunctionLogAlignment(4);
- setMinFunctionLogAlignment(2);
+ setMinFunctionAlignment(llvm::Align(4));
setStackPointerRegisterToSaveRestore(HRI.getStackRegister());
setBooleanContents(TargetLoweringBase::UndefinedBooleanContent);
setBooleanVectorContents(TargetLoweringBase::UndefinedBooleanContent);
Modified: llvm/trunk/lib/Target/Lanai/LanaiISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Lanai/LanaiISelLowering.cpp?rev=371200&r1=371199&r2=371200&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Lanai/LanaiISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Lanai/LanaiISelLowering.cpp Fri Sep 6 05:48:34 2019
@@ -145,7 +145,7 @@ LanaiTargetLowering::LanaiTargetLowering
setTargetDAGCombine(ISD::XOR);
// Function alignments (log2)
- setMinFunctionLogAlignment(2);
+ setMinFunctionAlignment(llvm::Align(4));
setPrefFunctionLogAlignment(2);
setJumpIsExpensive(true);
Modified: llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp?rev=371200&r1=371199&r2=371200&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp Fri Sep 6 05:48:34 2019
@@ -327,7 +327,7 @@ MSP430TargetLowering::MSP430TargetLoweri
setLibcallCallingConv(RTLIB::OGT_F64, CallingConv::MSP430_BUILTIN);
// TODO: __mspabi_srall, __mspabi_srlll, __mspabi_sllll
- setMinFunctionLogAlignment(1);
+ setMinFunctionAlignment(llvm::Align(2));
setPrefFunctionLogAlignment(1);
}
Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp?rev=371200&r1=371199&r2=371200&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Fri Sep 6 05:48:34 2019
@@ -518,7 +518,8 @@ MipsTargetLowering::MipsTargetLowering(c
setLibcallName(RTLIB::SRA_I128, nullptr);
}
- setMinFunctionLogAlignment(Subtarget.isGP64bit() ? 3 : 2);
+ setMinFunctionAlignment(Subtarget.isGP64bit() ? llvm::Align(8)
+ : llvm::Align(4));
// The arguments on the stack are defined in terms of 4-byte slots on O32
// and 8-byte slots on N32/N64.
Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=371200&r1=371199&r2=371200&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Fri Sep 6 05:48:34 2019
@@ -1180,7 +1180,7 @@ PPCTargetLowering::PPCTargetLowering(con
setJumpIsExpensive();
}
- setMinFunctionLogAlignment(2);
+ setMinFunctionAlignment(llvm::Align(4));
if (Subtarget.isDarwin())
setPrefFunctionLogAlignment(4);
Modified: llvm/trunk/lib/Target/RISCV/RISCVISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/RISCV/RISCVISelLowering.cpp?rev=371200&r1=371199&r2=371200&view=diff
==============================================================================
--- llvm/trunk/lib/Target/RISCV/RISCVISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/RISCV/RISCVISelLowering.cpp Fri Sep 6 05:48:34 2019
@@ -198,9 +198,9 @@ RISCVTargetLowering::RISCVTargetLowering
setBooleanContents(ZeroOrOneBooleanContent);
// Function alignments (log2).
- unsigned FunctionAlignment = Subtarget.hasStdExtC() ? 1 : 2;
- setMinFunctionLogAlignment(FunctionAlignment);
- setPrefFunctionLogAlignment(FunctionAlignment);
+ const llvm::Align FunctionAlignment(Subtarget.hasStdExtC() ? 2 : 4);
+ setMinFunctionAlignment(FunctionAlignment);
+ setPrefFunctionLogAlignment(Log2(FunctionAlignment));
// Effectively disable jump table generation.
setMinimumJumpTableEntries(INT_MAX);
Modified: llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp?rev=371200&r1=371199&r2=371200&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp Fri Sep 6 05:48:34 2019
@@ -1805,7 +1805,7 @@ SparcTargetLowering::SparcTargetLowering
setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom);
- setMinFunctionLogAlignment(2);
+ setMinFunctionAlignment(llvm::Align(4));
computeRegisterProperties(Subtarget->getRegisterInfo());
}
Modified: llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp?rev=371200&r1=371199&r2=371200&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp Fri Sep 6 05:48:34 2019
@@ -120,7 +120,7 @@ SystemZTargetLowering::SystemZTargetLowe
setBooleanVectorContents(ZeroOrNegativeOneBooleanContent);
// Instructions are strings of 2-byte aligned 2-byte values.
- setMinFunctionLogAlignment(2);
+ setMinFunctionAlignment(llvm::Align(4));
// For performance reasons we prefer 16-byte alignment.
setPrefFunctionLogAlignment(4);
Modified: llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp?rev=371200&r1=371199&r2=371200&view=diff
==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp Fri Sep 6 05:48:34 2019
@@ -171,7 +171,7 @@ XCoreTargetLowering::XCoreTargetLowering
setTargetDAGCombine(ISD::INTRINSIC_VOID);
setTargetDAGCombine(ISD::INTRINSIC_W_CHAIN);
- setMinFunctionLogAlignment(1);
+ setMinFunctionAlignment(llvm::Align(2));
setPrefFunctionLogAlignment(2);
}
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