[PATCH] D67070: [X86][SSE] Add support for <64 x i1> bool reduction

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.
Herald added a subscriber: ychen.


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Comment at: test/CodeGen/X86/vector-reduce-and-bool.ll:842
 ; AVX512F:       # %bb.0:
 ; AVX512F-NEXT:    vextracti64x4 $1, %zmm0, %ymm1
 ; AVX512F-NEXT:    vextracti128 $1, %ymm1, %xmm2
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craig.topper wrote:
> Can we do something to fix this case?
Yup, combineBitcastvxi1 needs some tweaking to better handle this. I'm happy to do this before or after this patch but they are separate improvements.


Repository:
  rL LLVM

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  https://reviews.llvm.org/D67070/new/

https://reviews.llvm.org/D67070